PSMN2R5-30YL,115 NXP Semiconductors, PSMN2R5-30YL,115 Datasheet

MOSFET N-CH 30V 100A LFPAK

PSMN2R5-30YL,115

Manufacturer Part Number
PSMN2R5-30YL,115
Description
MOSFET N-CH 30V 100A LFPAK
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PSMN2R5-30YL,115

Package / Case
LFPak-4
Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
2.4 mOhm @ 15A, 10V
Drain To Source Voltage (vdss)
30V
Current - Continuous Drain (id) @ 25° C
100A
Vgs(th) (max) @ Id
2.15V @ 1mA
Gate Charge (qg) @ Vgs
57nC @ 10V
Input Capacitance (ciss) @ Vds
3468pF @ 12V
Power - Max
88W
Mounting Type
Surface Mount
Minimum Operating Temperature
- 55 C
Configuration
Single Triple Source
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
2.5 mOhms
Drain-source Breakdown Voltage
30 V
Gate-source Breakdown Voltage
20 V
Continuous Drain Current
100 A
Power Dissipation
88 W
Maximum Operating Temperature
+ 175 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4680-2
934063071115
PSMN2R5-30YL T/R
1. Product profile
1.1 General description
1.2 Features and benefits
1.3 Applications
1.4 Quick reference data
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
industrial and communications applications.
Table 1.
[1]
Symbol
V
P
T
Dynamic characteristics
Q
Q
Avalanche ruggedness
E
I
Static characteristics
R
D
j
DS
tot
DS(AL)S
DSon
GD
G(tot)
PSMN2R5-30YL
N-channel 30 V 2.4 mΩ logic level MOSFET in LFPAK
Rev. 04 — 10 March 2011
High efficiency due to low switching
and conduction losses
Class-D amplifiers
DC-to-DC converters
Continuous current is limited by package.
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
junction temperature
drain-source on-state
resistance
gate-drain charge
total gate charge
non-repetitive
drain-source
avalanche energy
Conditions
T
T
see
T
V
T
V
V
see
V
I
R
D
j
mb
mb
j
GS
GS
DS
GS
GS
≥ 25 °C; T
= 25 °C
= 100 A; V
Figure 1
Figure 15
= 25 °C; V
= 25 °C; see
= 10 V; I
= 4.5 V; I
= 12 V; see
= 10 V; T
= 50 Ω; unclamped
j
D
sup
≤ 175 °C
j(init)
D
GS
= 15 A;
= 10 A;
Figure
≤ 30 V;
Figure 2
Suitable for logic level gate drive
sources
Motor control
Server power supplies
= 10 V;
= 25 °C;
14;
[1]
Min
-
-
-
-55
-
-
-
-
Product data sheet
Typ
-
-
-
-
1.79 2.4
6.5
27
-
Max Unit
30
100
88
175
-
-
103
V
A
W
°C
mΩ
nC
nC
mJ

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PSMN2R5-30YL,115 Summary of contents

Page 1

... PSMN2R5-30YL N-channel 30 V 2.4 mΩ logic level MOSFET in LFPAK Rev. 04 — 10 March 2011 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET plastic package using TrenchMOS technology. This product is designed and qualified for use in industrial and communications applications. ...

Page 2

... Figure °C; see Figure °C mb ≤ 10 µs; T pulsed ° ° j(init) ≤ Ω; unclamped V sup GS All information provided in this document is subject to legal disclaimers. Rev. 04 — 10 March 2011 PSMN2R5-30YL Graphic symbol mbb076 Version Min Max - kΩ -20 20 [1] Figure 1 - 100 [1] Figure 1 - 100 ...

Page 3

... N-channel 30 V 2.4 mΩ logic level MOSFET in LFPAK 003aac656 P 150 200 T (°C) mb Fig All information provided in this document is subject to legal disclaimers. Rev. 04 — 10 March 2011 PSMN2R5-30YL 120 der (%) 100 Normalized total power dissipation as a function of mounting base temperature 100 μ 100 ms ...

Page 4

... Transient thermal impedance from junction to mounting base as a function of pulse duration PSMN2R5-30YL Product data sheet N-channel 30 V 2.4 mΩ logic level MOSFET in LFPAK Conditions see Figure All information provided in this document is subject to legal disclaimers. Rev. 04 — 10 March 2011 PSMN2R5-30YL Min Typ Max - - 1.4 003aac657 t p δ ...

Page 5

... Figure 14; see Figure see Figure 14; DS see Figure MHz °C; see Figure 0.5 Ω 4 4.7 Ω R G(ext) All information provided in this document is subject to legal disclaimers. Rev. 04 — 10 March 2011 PSMN2R5-30YL Min Typ Max Unit 1.3 1.7 2. µ 100 µ ...

Page 6

... Output characteristics: drain current as a function of drain-source voltage; typical values 003aac655 9 R DSon (mΩ (A) D Fig 8. Drain-source on-state resistance as a function of drain current; typical values All information provided in this document is subject to legal disclaimers. Rev. 04 — 10 March 2011 PSMN2R5-30YL Min Typ - 0. 003aac653 10 V (V) = 3 003aac658 V ( ...

Page 7

... V (V) GS Fig 10. Drain-source on-state resistance as a function 003aab271 typ max Fig 12. Gate-source threshold voltage as a function of All information provided in this document is subject to legal disclaimers. Rev. 04 — 10 March 2011 PSMN2R5-30YL 4 R DSon (mΩ gate-source voltage; typical values (th) (V) max 2 typ ...

Page 8

... T j Fig 14. Gate charge waveform definitions 003aac662 5000 C (pF) 4000 (V) DS 3000 2000 1000 (nC) G Fig 16. Input, output and reverse transfer capacitances All information provided in this document is subject to legal disclaimers. Rev. 04 — 10 March 2011 PSMN2R5-30YL GS(pl) V GS(th GS1 GS2 G(tot) C iss ...

Page 9

... N-channel 30 V 2.4 mΩ logic level MOSFET in LFPAK 100 150 ° 0.0 0.2 0.4 0.6 All information provided in this document is subject to legal disclaimers. Rev. 04 — 10 March 2011 PSMN2R5-30YL 003aac652 25 °C 0.8 1.0 V (V) SD © NXP B.V. 2011. All rights reserved ...

Page 10

... D max 4.41 2.2 0.9 0.25 0.30 4.10 4.20 3.62 2.0 0.7 0.19 0.24 3.80 REFERENCES JEDEC JEITA MO-235 All information provided in this document is subject to legal disclaimers. Rev. 04 — 10 March 2011 PSMN2R5-30YL detail (1) (1) ( 5.0 3.3 6.2 0.85 1.3 1.27 4.8 3.1 5 ...

Page 11

... N-channel 30 V 2.4 mΩ logic level MOSFET in LFPAK Data sheet status Change notice Product data sheet - Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 04 — 10 March 2011 PSMN2R5-30YL Supersedes PSMN2R5-30YL v.3 PSMN2R5-30YL v.2 © NXP B.V. 2011. All rights reserved ...

Page 12

... In case an individual agreement is concluded only the terms and conditions of the respective All information provided in this document is subject to legal disclaimers. Rev. 04 — 10 March 2011 PSMN2R5-30YL © NXP B.V. 2011. All rights reserved ...

Page 13

... TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 04 — 10 March 2011 PSMN2R5-30YL Trademarks © NXP B.V. 2011. All rights reserved ...

Page 14

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 10 March 2011 Document identifier: PSMN2R5-30YL ...

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