LC4256V-75TN100E LATTICE SEMICONDUCTOR, LC4256V-75TN100E Datasheet - Page 59

• Manufacturer Part Number: LC4256V-75TN100E
• Description: CPLD ispMACH® 4000V Family 256 Macro Cells 168MHz EECMOS Technology 3.3V 100-Pin TQFP
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of LC4256V-75TN100E

• Package: 100TQFP
• Family Name: ispMACH® 4000V
• Number Of Macro Cells: 256
• Maximum Propagation Delay Time: 7.5 ns
• Number Of User I/os: 64
• Number Of Logic Blocks/elements: 36
• Typical Operating Supply Voltage: 3.3 V
• Maximum Operating Frequency: 168 MHz
• Number Of Product Terms Per Macro: 80
• Memory Type: EEPROM
• Operating Temperature: -40 to 130 °C

Lattice Semiconductor
ispMACH 4128V and 4256V Logic Signal Connections: 144-Pin TQFP (Cont.)
Pin Number
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
Bank Number
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
-
-
-
VCCO (Bank 0)
VCCO (Bank 1)
VCCO (Bank 1)
GND (Bank 0)
GND (Bank 1)
GND (Bank 1)
GND (Bank 1)
GLB/MC/Pad
CLK1/I
CLK2/I
VCC
GND
TMS
NC
E10
E12
E13
E14
NC
F10
D9
D8
D6
D5
D4
D2
D1
D0
E0
E1
E2
E4
E5
E6
E8
E9
F0
F1
F2
F4
F5
F6
F8
F9
2
2
ispMACH 4128V
59
ispMACH 4000V/B/C/Z Family Data Sheet
E^10
E^11
ORP
D^7
D^6
D^5
D^4
D^3
D^2
D^1
D^0
E^0
E^1
E^2
E^3
E^4
E^5
E^6
E^7
E^8
E^9
F^0
F^1
F^2
F^3
F^4
F^5
F^6
F^7
F^8
-
-
-
-
-
-
-
-
-
-
-
-
-
-
VCCO (Bank 0)
VCCO (Bank 1)
VCCO (Bank 1)
GND (Bank 0)
GND (Bank 1)
GND (Bank 1)
GND (Bank 1)
GLB/MC/Pad
CLK1/I
CLK2/I
GND
VCC
TMS
H12
H10
K12
K10
J10
J12
L14
L12
L10
G4
G2
I10
I12
H8
H6
H4
H2
K8
K6
K4
K2
J2
J4
J6
J8
I2
I4
I6
I8
I
I
2
2
ispMACH 4256V
ORP
G^2
G^1
H^6
H^5
H^4
H^3
H^2
H^1
K^6
K^5
K^4
K^3
K^2
K^1
L^7
L^6
L^5
J^1
J^2
J^3
J^4
J^5
J^6
I^1
I^2
I^3
I^4
I^5
I^6
-
-
-
-
-
-
-
-
-
-
-
-
-
-