PUMD3,115 NXP Semiconductors, PUMD3,115 Datasheet

TRANS NPN/PNP 50V 100MA SOT363

PUMD3,115

Manufacturer Part Number
PUMD3,115
Description
TRANS NPN/PNP 50V 100MA SOT363
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PUMD3,115

Package / Case
SC-70-6, SC-88, SOT-363
Transistor Type
1 NPN, 1 PNP - Pre-Biased (Dual)
Current - Collector (ic) (max)
100mA
Voltage - Collector Emitter Breakdown (max)
50V
Resistor - Base (r1) (ohms)
10K
Resistor - Emitter Base (r2) (ohms)
10K
Dc Current Gain (hfe) (min) @ Ic, Vce
30 @ 5mA, 5V
Vce Saturation (max) @ Ib, Ic
150mV @ 500µA, 10mA
Current - Collector Cutoff (max)
1µA
Power - Max
300mW
Mounting Type
Surface Mount
Configuration
Dual
Transistor Polarity
NPN/PNP
Typical Input Resistor
10 KOhms
Typical Resistor Ratio
1
Mounting Style
SMD/SMT
Collector- Emitter Voltage Vceo Max
50 V
Peak Dc Collector Current
100 mA
Maximum Operating Temperature
+ 150 C
Minimum Operating Temperature
- 65 C
Collector-emitter Voltage
50V
Dc Current Gain (min)
30
Operating Temperature Classification
Military
Mounting
Surface Mount
Pin Count
6
Package Type
SOT-363
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Frequency - Transition
-
Lead Free Status / Rohs Status
Compliant
Other names
568-5039-2
934050170115
PUMD3 T/R
PUMD3 T/R
PUMD3,115

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PUMD3,115
Manufacturer:
NEXPERIA/安世
Quantity:
20 000
1. Product profile
1.1 General description
1.2 Features
1.3 Applications
1.4 Quick reference data
NPN/PNP Resistor-Equipped Transistors (RET).
Table 1.
Table 2.
Type number
PEMD3
PIMD3
PUMD3
Symbol
V
I
R1
R2/R1
O
CEO
PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors;
R1 = 10 kΩ, R2 = 10 kΩ
Rev. 10 — 15 November 2009
Built-in bias resistors
Simplifies circuit design
Reduces component count
Reduces pick and place costs
Low current peripheral driver
Control of IC inputs
Replaces general-purpose transistors in digital applications
Product overview
Quick reference data
Parameter
collector-emitter voltage
output current (DC)
bias resistor 1 (input)
bias resistor ratio
Package
NXP
SOT666
SOT457
SOT363
SC-74
JEITA
-
SC-88
Conditions
open base
PNP/PNP
complement
PEMB11
-
PUMB11
Min
-
-
7
0.8
Typ
-
-
10
1
Product data sheet
NPN/NPN
complement
PEMH11
-
PUMH11
Max
50
100
13
1.2
Unit
V
mA

Related parts for PUMD3,115

PUMD3,115 Summary of contents

Page 1

PEMD3; PIMD3; PUMD3 NPN/PNP resistor-equipped transistors kΩ kΩ Rev. 10 — 15 November 2009 1. Product profile 1.1 General description NPN/PNP Resistor-Equipped Transistors (RET). Table 1. Type number PEMD3 PIMD3 PUMD3 1.2 Features Built-in ...

Page 2

... NXP Semiconductors 2. Pinning information Table 3. Pin Ordering information Table 4. Type number PEMD3 PIMD3 PUMD3 4. Marking Table 5. Type number PEMD3 PIMD3 PUMD3 [ made in Hong Kong * = p: made in Hong Kong * = t: made in Malaysia * = W: made in China PEMD3_PIMD3_PUMD3_10 Product data sheet PEMD3; PIMD3; PUMD3 NPN/PNP resistor-equipped transistors kΩ kΩ ...

Page 3

... NXP Semiconductors 5. Limiting values Table 6. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Per transistor; for the PNP transistor with negative polarity V CBO V CEO V EBO tot T stg amb Per device P tot [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. Device mounted on an FR4 PCB with 65 μ ...

Page 4

... NXP Semiconductors 6. Thermal characteristics Table 7. Symbol Per transistor R th(j-a) Per device R th(j-a) [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. Device mounted on an FR4 PCB with 65 μm copper strip line, standard footprint. [2] [3] Reflow soldering is the only recommended soldering method. ...

Page 5

... NXP Semiconductors − 150 °C (1) T amb = 25 °C (2) T amb = −40 °C (3) T amb Fig 1. TR1 (NPN): DC current gain as a function of collector current; typical values 10 V I(on) (V) (1) (2) (3) 1 −1 10 − 0 −40 °C (1) T amb = 25 °C (2) T amb = 100 °C (3) T amb Fig 3 ...

Page 6

... NXP Semiconductors − −10 2 −10 −1 −1 −10 −1 −10 = − 150 °C (1) T amb = 25 °C (2) T amb = −40 °C (3) T amb Fig 5. TR2 (PNP): DC current gain as a function of collector current; typical values − I(on) (V) −10 (2) (1) −1 (3) −1 −10 −1 − ...

Page 7

... NXP Semiconductors 8. Package outline 2.2 1 2.2 1.35 2.0 1.15 pin 1 index 0.3 0.65 0.2 1.3 Dimensions in mm Fig 9. Package outline SOT363 (SC-88) 1.7 1.5 Fig 11. Package outline SOT666 PEMD3_PIMD3_PUMD3_10 Product data sheet PEMD3; PIMD3; PUMD3 NPN/PNP resistor-equipped transistors kΩ kΩ 1.1 ...

Page 8

... NXP Semiconductors 9. Packing information Table 9. The indicated -xxx are the last three digits of the 12NC ordering code. Type number Package Description PEMD3 PIMD3 PUMD3 [1] For further information and the availability of packing methods, see [2] T1: normal taping [3] T2: reverse taping PEMD3_PIMD3_PUMD3_10 Product data sheet PEMD3 ...

Page 9

... PEMD3; PIMD3; PUMD3 NPN/PNP resistor-equipped transistors kΩ kΩ Data sheet status Product data sheet This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions and disclaimers. No changes were made to the technical content. Figure 9 “Package outline SOT363 (SC-88)” ...

Page 10

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 11

... NXP Semiconductors 13. Contents 1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1 General description . . . . . . . . . . . . . . . . . . . . . 1 1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 1 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Limiting values Thermal characteristics . . . . . . . . . . . . . . . . . . 4 7 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7 9 Packing information . . . . . . . . . . . . . . . . . . . . . 8 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 9 11 Legal information ...

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