TEA5764UK-G NXP Semiconductors, TEA5764UK-G Datasheet - Page 10

• Manufacturer Part Number: TEA5764UK-G
• Description: Tuners FM RADIO WITH RDS
• Manufacturer: NXP Semiconductors

Specifications of TEA5764UK-G

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: TEA5764UK/N2,027

Philips Semiconductors
TEA5764UK_2
Product data sheet
8.13.1 Soft mute
8.13.2 Hard mute
8.13.3 Audio frequency mute
8.12 Voltage level generator and analog-to-digital converter
8.13 Mute
8.14 MPX decoder
8.15 Signal dependent mono/stereo blend (stereo noise cancellation)
The voltage level indicates the field strength received by the antenna. The voltage level is
analog-to-digital converted to a 4-bit word and output via the I
continuously active and can be read at any time via the I
when the voltage level falls below a predefined selectable threshold. Bit LHSW allows
either large or small hysteresis steps to be chosen; see
When the ADC level is set to 3, its minimum value, the search algorithm will only stop at
channels having a RF level higher than, or equal to, ADC level 3. After completing the
search algorithm and being tuned to a station, due to hysteresis the effective limit will be
set to 0. This means that the continuous ADC level check will never set the LEVFLAG.
The low-pass filtered voltage level drives the soft mute attenuator at low RF input levels:
the audio output is faded and hence also the noise (see graphs referenced 1 in
and
The soft mute function can also be switched off via the I
The audio outputs VAFL and VAFR can be hard-muted by bit MU in byte TNCTRL2, which
means that they are put into 3-state. This can also be done by setting bits Left Hard Mute
(LHM) or Right Hard Mute (RHM) in byte TESTBITS, which allows either one or both
channels to be muted and forces the TEA5764UK to mono mode. When the TEA5764UK
is in Standby mode the audio outputs are hard-muted.
The audio signal is muted by setting bit AFM of the TNCTRL1 register to logic 1. In the
soft mute attenuator the audio signal is blocked and so pins VAFL and VAFR will be at
their DC biasing point with no signal.
The audio is automatically muted during an RDS update as shown in the flowchart of
Figure
AFM to logic 1 before the search action and resetting it to logic 0 afterwards.
Setting bit AFM to logic 0 stops the RDS data.
The PLL stereo decoder is adjustment free. It can be switched to mono via the I
If the RF input level decreases, the MPX decoder blends from stereo to mono to limit the
output noise. The continuous mono-to-stereo blend can also be programmed via the
I
cancellation can be switched off via the I
2
C-bus to an RF level dependent switched mono-to-stereo transition. Stereo noise
Figure
3. When the audio must be muted during Search mode, it is done by setting bit
17).
Rev. 02 — 9 August 2005
2
C-bus by bit SNC.
2
Table 24
2
C-bus, using bit SMUTE.
C-bus. It also activates a flag
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
2
C-bus. The ADC level is
TEA5764UK
and
Section
FM radio + RDS
9.1.4.5.
Figure 15
2
C-bus.
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