SLXT334QE.B3 Intel, SLXT334QE.B3 Datasheet - Page 7

• Manufacturer Part Number: SLXT334QE.B3
• Manufacturer: Intel

Specifications of SLXT334QE.B3

• Operating Supply Voltage (typ): 5V
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

Datasheet
Pin #
1. Entries in I/O column are: DI = digital input; DO = digital output; DI/O = digital input/output; AI = analog input; AO = analog
10
11
12
13
1
2
3
4
5
6
7
8
9
output; S = supply. Note: Do not leave digital inputs floating, with the exception of pins 17, 18, and 55-58.
Table 1. LXT334 Pin Descriptions
TDATA0
TDATA1
TPOS0/
TNEG0/
TPOS1/
TNEG1/
TRING0
TGND0
TVCC0
TCLK0
TCLK1
MCLK
TTIP0
TTIP1
UBS0
UBS1
GND
Sym
I/O
AO
AO
AO
DI
DI
DI
DI
DI
DI
DI
S
S
S
1
Master Clock Input. An independent and free-running 2.048 or 1.544 MHz clock input generates
the internal reference clocks for all transceivers. On Loss of Signal (LOS), the LXT334 derives
RCLKx from this master clock. With MCLK asserted High, the LXT334 disables the PLL clock
recovery circuits. The transceiver then feeds RPOSx and RNEGx to an internal XOR gate that
performs logically-exclusive ORs for both data signals and connects this output to RCLKx for
external clock recovery. In this mode, the LXT334 operates as a data recovery circuit. With MCLK
asserted Low, the LXT334 powers down its clock and data recovery circuits and switches the
output pins RCLKx, RPOSx and RNEGx to tri-state mode. Driving both MCLK and TCLKx Low
powers the device down.
Clocked Data/Clock Recovery
Transmit Clock/Transmit Power Down Input–Port 0. All TCLKx pins are identical. The LXT334
samples TPOSx and TNEGx on the falling edge of TCLKx. With TCLKx asserted Low, the total
transmit path, including the output drivers, enters a low-power, high-Z mode with all analog and
digital circuitry powered down. With TCLKx asserted High for more than 16 clock cycles, the
TPOSx and TNEGx duty cycles determine the transmit output pulse widths. In this mode, the
LXT334 operates as a line driver.
Clocked Transmitter
MCLK active with TCLKx High sets TAOS (Transmit All Ones) Mode.
Transmit Positive Data/Transmit Data Input–Port 0. All TPOSx/TDATAx pins are identical. In
bipolar mode this pin (TPOSx) acts as active High input for the positive pulse to be transmitted. In
unipolar mode this pin (TDATAx) acts as active High input for the data to be transmitted on the line.
Transmit Negative Data/Unipolar-Bipolar Select Input–Port 0. All TNEGx/UBSx pins are
identical. In bipolar mode, this pin acts as input for the negative pulse to be transmitted. If this pin
is asserted High for more than 16 TCLK cycles, the LXT334 switches to unipolar mode. The device
immediately returns to bipolar mode once this pin goes Low.
Transmit Clock/Transmit Power Down Input–Port 1. See TCLK0, pin 2.
Transmit Positive Data/Transmit Data Input–Port 1. See TPOS0/TDATA0, pin 3.
Transmit Negative Data/Unipolar-Bipolar Select Input–Port 1. See TNEG0/UBS0, pin 4.
Ground.
Transmit Tip Output–Port 0. All pin pairs TTIPx/TRINGx are identical. Pin pairs TTIPx/TRINGx
are differential line driver outputs designed to drive 75
cables using transformer coupling.
Transmit Ground–Port 0. Ground return for transmit driver 0.
Transmit Positive Supply–Port 0. +5 VDC power supply input for transmit driver 0.
Transmit Ring Output–Port 0. All pin pairs TTIPx/TRINGx are identical. Pin pairs TTIPx/TRINGx
are differential line driver outputs designed to drive 75
cables using transformer coupling. See TTIP0, pin 9.
Transmit Tip Output–Port 1. See TTIP0, pin 9.
TCLKx
MCLK
UBSx
H
H
H
L
L
L
Operating Mode
Power Down
Data Recovery
Operating Mode
Line Driver (or TAOS if MCLK is Clocked)
Power Down
Operating Mode
Bipolar Mode
Unipolar Mode
Quad Short-Haul Transceiver with Clock Recovery — LXT334
Description
unbalanced or 100
unbalanced or 100 /120
/120
balanced
balanced
7