FLLXT971ABC.A4 Intel, FLLXT971ABC.A4 Datasheet - Page 81

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FLLXT971ABC.A4

Manufacturer Part Number
FLLXT971ABC.A4
Description
Manufacturer
Intel
Datasheet

Specifications of FLLXT971ABC.A4

Lead Free Status / RoHS Status
Not Compliant

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Datasheet
Document Number: 249414-003
Revision Date: June 18, 2004
Figure 33. Intel
Table 37. Intel
TXD, TX_EN, TX_ER setup to
TX_CLK High
TXD, TX_EN, TX_ER hold from
TX_CLK High
TX_EN sampled to CRS asserted
TX_EN sampled to CRS de-asserted
TX_EN sampled to TPFO out (Tx
latency)
1. Typical values are at 25 °C and are for design aid only, not guaranteed, and not subject to production
2. BT (Bit Time) is the duration of one bit as transferred to and from the MAC and is the reciprocal of the bit
TX_EN,
TX_ER
TX_CLK
testing.
rate. 10BASE-T bit time = 10
TPFO
®
TXD,
®
CRS
LXT971A Transceiver 10BASE-T Transmit Timing Parameters
LXT971A Transceiver 10BASE-T Transmit Timing
Parameter
t
1
t
3
-7
Intel
s or 100 ns.
t
5
®
Symbol
LXT971A Single-Port 10/100 Mbps PHY Transceiver
t1
t2
t3
t4
t5
Min
10
0
t
2
Typ
72.5
2
1
1
Max
t
4
Units
BT
BT
BT
ns
ns
2
Test Conditions
B3459-01
81

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