PIC16LF1847T-I/SO Microchip Technology, PIC16LF1847T-I/SO Datasheet - Page 52

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PIC16LF1847T-I/SO

Manufacturer Part Number
PIC16LF1847T-I/SO
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan
Manufacturer
Microchip Technology
Series
PIC® XLP™ mTouch™ 16Fr
Datasheet

Specifications of PIC16LF1847T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (0.295", 7.50mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC16(L)F1847
4.5
The memory location 8006h is where the Device ID and
Revision ID are stored. The upper nine bits hold the
Device ID. The lower five bits hold the Revision ID. See
Section 11.5 “User ID, Device ID and Configuration
Word Access”
these memory locations.
Development tools, such as device programmers and
debuggers, may be used to read the Device ID and
Revision ID.
REGISTER 4-3:
DS41453B-page 52
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13-5
bit 4-0
Note 1:
DEV2
R/P-1
U-1
Device ID and Revision ID
This location cannot be written.
Unimplemented: Read as ‘1’
DEV<8:0>: Device ID bits
010100100 = PIC16F1847
010100101 = PIC16LF1847
REV<4:0>: Revision ID bits
These bits are used to identify the revision.
for more information on accessing
R/P-1
DEV1
U-1
DEVICEID: DEVICE ID REGISTER
R/P-1
DEV8
R/P-1
DEV0
P = Programmable bit
W = Writable bit
‘1’ = Bit is set
R/P-1
DEV7
R/P-1
REV4
Preliminary
DEV6
REV3
R/P-1
R/P-1
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
DEV5
REV2
R/P-1
R/P-1
 2011 Microchip Technology Inc.
R/P-1
DEV4
R/P-1
REV1
R/P-1
DEV3
R/P-1
REV0
bit 8
bit 0

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