PIC18LF13K22-E/SO Microchip Technology, PIC18LF13K22-E/SO Datasheet - Page 34

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PIC18LF13K22-E/SO

Manufacturer Part Number
PIC18LF13K22-E/SO
Description
8KB Flash, 256bytes RAM, 256bytes EEPROM, 16MIPS, NanoWatt XLP 20 SOIC .300in TU
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18LF13K22-E/SO

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
18
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
A/d Bit Size
10 bit
A/d Channels Available
12
Height
2.05 mm
Length
12.8 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.8 V, 2.7 V
Width
7.5 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F1XK22/LF1XK22
8.0
DS41357B-page 34
Standard Operating Conditions
Operating Temperature: 25°C is recommended
P12
P12A
P13
P13A
P14
P15
P16
P17
P18
P19
P20
Note 1:
m No.
Para
T
T
A
T
T
A
T
T
T
T
T
T
T
AC/DC CHARACTERISTICS TIMING REQUIREMENTS FOR PROGRAM/
VERIFY TEST MODE (CONTINUED)
Sym.
HLD
HLD
SET
SET
VALID
SET
DLY
HLD
HLD
HIZ
PPDP
Do not allow excess time when transitioning MCLR between V
executions to occur. The maximum transition time is:
1 T
only) + 1.5 μs (for EC mode only) where T
and T
data sheet for the particular device.
2
2
2
2
3
8
3
4
CY
Input Data Hold Time from MCLR/V
Input Data Hold Time from MCLR/V
V
V
Data Out Valid from PGC ↑
PGM ↑ Setup Time to MCLR/V
Delay between Last PGC ↓ and MCLR/V
MCLR/V
MCLR/V
Delay from PGC ↑ to PGD High-Z
Hold time after V
OSC
+ T
DD
DD
PWRT
is the oscillator period. For specific values, refer to the Electrical Characteristics section of the device
↑ Setup Time to MCLR/V
↑ Setup Time to MCLR/V
PP
PP
(if enabled) + 1024 T
/RA3 ↓ to V
/RA3 ↓ to PGM ↓
PP
Characteristic
changes
DD
Advance Information
PP
PP
OSC
PP
/RA3 ↑
/RA3 ↑
/RA3 ↑
PP
PP
(for LP, HS, HS/PLL and XT modes only) + 2 ms (for HS/PLL mode
CY
/RA3 ↑
/RA3 ↑
is the instruction cycle time, T
PP
/RA3
Min.
100
70
70
10
2
2
0
0
3
5
IL
and V
IHH
Max.
100
10
; this can cause spurious program
PWRT
Units
© 2009 Microchip Technology Inc.
nS
μs
μs
ns
μs
ns
μs
ns
μs
is the Power-up Timer period
s
s
PIC18F1XK22 Only.
Refer to Figure 2.1.1.
PIC18F1XK22 Only.
Refer to Figure 2.1.1.
Conditions

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