PIC18LF13K22-E/SO Microchip Technology, PIC18LF13K22-E/SO Datasheet - Page 6

• Manufacturer Part Number: PIC18LF13K22-E/SO
• Description: 8KB Flash, 256bytes RAM, 256bytes EEPROM, 16MIPS, NanoWatt XLP 20 SOIC .300in TU
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF13K22-E/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SOIC (7.5mm Width)
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART, I2C, SPI
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 18
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• A/d Bit Size: 10 bit
• A/d Channels Available: 12
• Height: 2.05 mm
• Length: 12.8 mm
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.8 V, 2.7 V
• Width: 7.5 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F1XK22/LF1XK22
In addition to the program Flash space, there are three
blocks in the Configuration and ID space that are
accessible to the user through table reads and table
writes. Their locations in the memory map are shown in
Figure 3-3.
Users may store identification information (ID) in eight
ID registers. These ID registers are mapped in
addresses 200000h through 200007h. The ID locations
read out normally, even after code protection is applied.
Locations 300001h through 30000Dh are reserved for
the Configuration bits. These bits select various device
options and are described in Section 6.0 “Configura-
tion Word”. These Configuration bits read out
normally, even after code protection.
Locations 3FFFFEh and 3FFFFFh are reserved for the
device ID bits. These bits may be used by the
programmer to identify what device type is being
programmed and are described in Section 6.0
“Configuration Word”. These device ID bits read out
normally, even after code protection.
FIGURE 3-3:
DS41357B-page 6
2FFFFFh
000000h
01FFFFh
1FFFFFh
3FFFFFh
Note:
Unimplemented
Sizes of memory areas are not to scale.
Program Flash
Configuration
CONFIGURATION AND ID LOCATIONS FOR PIC18F1XK22/LF1XK22 DEVICES
Read as ‘0’
and ID
Space
Advance Information
3.0.1
Memory in the address space, 0000000h to 3FFFFFh,
is addressed via the Table Pointer register, which is
comprised of three Pointer registers:
• TBLPTRU, at RAM address 0FF8h
• TBLPTRH, at RAM address 0FF7h
• TBLPTRL, at RAM address 0FF6h
The 4-bit command, ‘0000’ (core instruction), is used to
load the Table Pointer prior to using any read or write
operations.
Addr[21:16]
TBLPTRU
MEMORY ADDRESS POINTER
ID Location 1
ID Location 2
ID Location 3
ID Location 4
ID Location 5
ID Location 6
ID Location 7
ID Location 8
CONFIG1H
CONFIG2H
CONFIG3H
CONFIG5H
CONFIG6H
CONFIG7H
CONFIG2L
CONFIG4L
CONFIG5L
CONFIG6L
CONFIG7L
Device ID1
Device ID2
Addr[15:8]
TBLPTRH
© 2009 Microchip Technology Inc.
3FFFFEh
3FFFFFh
30000Ah
30000Bh
30000Ch
30000Dh
200000h
200001h
200002h
200003h
200004h
200005h
200006h
200007h
300001h
300002h
300003h
300004h
300005h
300006h
300007h
300008h
300009h
TBLPTRL
Addr[7:0]