PIC24FV32KA302-E/SP Microchip Technology, PIC24FV32KA302-E/SP Datasheet - Page 117

• Manufacturer Part Number: PIC24FV32KA302-E/SP
• Description: 32KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 28 SPDIP .300in
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FV32KA302-E/SP

• Processor Series: PIC24FV
• Core: PIC
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• Package / Case: SPDIP-28
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 23
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

9.0
The oscillator system for the PIC24FV32KA304 family
of devices has the following features:
• A total of five external and internal oscillator options
• On-chip 4x Phase Locked Loop (PLL) to boost
FIGURE 9-1:
 2011 Microchip Technology Inc.
Note:
as clock sources, providing 11 different clock
modes.
internal operating frequency on select internal and
external oscillator sources.
SOSCO
SOSCI
OSCO
OSCI
OSCILLATOR
CONFIGURATION
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended
reference source. For more information
on Oscillator Configuration, refer to the
“PIC24F
Section 38. “Oscillator with 500 kHz
Low-Power FRC” (DS39726).
Primary Oscillator
Secondary Oscillator
Oscillator
Oscillator
Oscillator
500 kHz
LPFRC
8 MHz
LPRC
FRC
Family
PIC24FV32KA304 FAMILY CLOCK DIAGRAM
to
SOSCEN
Enable
Oscillator
be
31 kHz (nominal)
Reference
a
comprehensive
Manual”,
CLKDIV<10:8>
PIC24FV32KA304 FAMILY
4 x PLL
8 MHz
4 MHz
• Software-controllable switching between various
• Software-controllable postscaler for selective
• System frequency range declaration bits for EC
• A Fail-Safe Clock Monitor (FSCM) that detects clock
A simplified diagram of the oscillator system is shown in
Figure
clock sources.
clocking of CPU for system power savings.
mode. When using an external clock source, the
current consumption is reduced by setting the
declaration bits to the expected frequency range.
failure and permits safe application recovery or
shutdown.
ECPLL,FRCPLL
XTPLL, HSPLL
XT, HS, EC
9-1.
FRCDIV
SOSC
LPRC
FRC
Clock Control Logic
Fail-Safe
Monitor
Clock
CLKDIV<14:12>
Reference Clock
WDT, PWRT, DSWDT
Clock Source Option
for Other Modules
Generator
REFOCON<15:8>
DS39995B-page 117
Peripherals
REFO
CLKO
CPU