PIC24FV32KA302-E/SP Microchip Technology, PIC24FV32KA302-E/SP Datasheet - Page 182

• Manufacturer Part Number: PIC24FV32KA302-E/SP
• Description: 32KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 28 SPDIP .300in
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FV32KA302-E/SP

• Processor Series: PIC24FV
• Core: PIC
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• Package / Case: SPDIP-28
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 23
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

PIC24FV32KA304 FAMILY
18.1
The UART module includes a dedicated 16-bit Baud
Rate Generator (BRG). The UxBRG register controls
the period of a free-running, 16-bit timer.
provides the formula for computation of the baud rate
with BRGH = 0.
EQUATION 18-1:
Example 18-1
error for the following conditions:
• F
• Desired Baud Rate = 9600
EXAMPLE 18-1:
DS39995B-page 182
Note 1:
Desired Baud Rate
Solving for UxBRG value:
Calculated Baud Rate = 4000000/(16 (25 + 1))
Error
Note 1:
CY
= 4 MHz
UART Baud Rate Generator (BRG)
UxBRG
UxBRG
UxBRG
Baud Rate =
UxBRG =
Based on F
and PLL are disabled.
Based on F
provides the calculation of the baud rate
UART BAUD RATE WITH
BRGH = 0
BAUD RATE ERROR CALCULATION (BRGH = 0)
16 • (UxBRG + 1)
CY
16 • Baud Rate
= F
= ((F
= ((4000000/9600)/16) – 1
= 25
= 9615
= (Calculated Baud Rate – Desired Baud Rate)
= (9615 – 9600)/9600
= 0.16%
CY
= F
Desired Baud Rate
= F
CY
F
F
CY
CY
OSC
CY
/(16 (UxBRG + 1))
OSC
/Desired Baud Rate)/16) – 1
(1)
/2; Doze mode
/2; Doze mode and PLL are disabled.
Equation 18-1
– 1
The maximum baud rate (BRGH = 0) possible is
F
possible is F
Equation 18-2
the baud rate with BRGH = 1.
EQUATION 18-2:
The maximum baud rate (BRGH = 1) possible is F
(for UxBRG = 0) and the minimum baud rate possible
is F
Writing a new value to the UxBRG register causes the
BRG timer to be reset (cleared). This ensures the BRG
does not wait for a timer overflow before generating the
new baud rate.
CY
Note 1:
CY
/16 (for UxBRG = 0) and the minimum baud rate
/(4 * 65536).
Baud Rate =
UxBRG =
CY
Based on F
and PLL are disabled.
/(16 * 65536).
shows the formula for computation of
(1)
UART BAUD RATE WITH
BRGH = 1
 2011 Microchip Technology Inc.
4 • (UxBRG + 1)
CY
4 • Baud Rate
= F
F
F
OSC
CY
CY
(1)
/2; Doze mode
– 1
CY
/4