PIC24FV32KA302-E/SP Microchip Technology, PIC24FV32KA302-E/SP Datasheet - Page 158

• Manufacturer Part Number: PIC24FV32KA302-E/SP
• Description: 32KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 28 SPDIP .300in
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FV32KA302-E/SP

• Processor Series: PIC24FV
• Core: PIC
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• Package / Case: SPDIP-28
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 23
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

PIC24FV32KA304 FAMILY
15.3
In PWM mode, the output compare module can be
configured for edge-aligned or center-aligned pulse
waveform generation. All PWM operations are
double-buffered (buffer registers are internal to the
module and are not mapped into SFR space).
To
edge-aligned PWM operation:
1.
2.
3.
FIGURE 15-2:
DS39995B-page 158
OC Clock
Sources
Trigger and
Sync Sources
Calculate the desired on-time and load it into the
OCxR register.
Calculate the desired period and load it into the
OCxRS register.
Select the current OCx as the synchronization
source by writing 0x1F to SYNCSEL<4:0>
(OCxCON2<4:0>)
(OCxCON2<7>).
configure
Pulse-Width Modulation (PWM)
Mode
SYNCSELx
TRIGSTAT
TRIGMODE
OCTSELx
OCTRIG
the
Trigger and
Sync Logic
output
Clock
Select
OUTPUT COMPARE BLOCK DIAGRAM (DOUBLE-BUFFERED, 16-BIT PWM MODE)
and
Reset
compare
‘0’
Match Event
Increment
Reset
to
OCxR and DCB<1:0> Buffers
module
OCTRIG
OCxR and DCB<1:0>
OCxRS Buffer
Comparator
Comparator
OCxCON1
OCxCON2
OCxTMR
OCxRS
for
Rollover/Reset
Rollover/Reset
Match
Event
Match
Event
Rollover
4.
5.
6.
7.
Select
OCTSEL2<2:0> (OCxCON<12:10>) bits.
Enable interrupts, if required, for the timer and
output compare modules. The output compare
interrupt is required for PWM Fault pin utilization.
Select the desired PWM mode in the OCM<2:0>
(OCxCON1<2:0>) bits.
If a timer is selected as a clock source, set the
TMRy prescale value and enable the time base by
setting the TON (TxCON<15>) bit.
OC Output Timing
a
and Fault Logic
clock
OCx Interrupt
OCMx
OCINV
OCTRIS
FLTOUT
FLTTRIEN
FLTMD
ENFLTx
OCFLTx
DCB<1:0>
 2011 Microchip Technology Inc.
source
OCFA/OCFB/CxOUT
by
OCx Pin
writing
the