PIC24FV32KA302-E/SP Microchip Technology, PIC24FV32KA302-E/SP Datasheet - Page 206

32KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 28 SPDIP .300in

PIC24FV32KA302-E/SP

Manufacturer Part Number
PIC24FV32KA302-E/SP
Description
32KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 28 SPDIP .300in
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheet

Specifications of PIC24FV32KA302-E/SP

Processor Series
PIC24FV
Core
PIC
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
2 KB
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Package / Case
SPDIP-28
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
23
Eeprom Size
512 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
PIC24FV32KA304 FAMILY
REGISTER 20-1:
DS39995B-page 206
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
R-0, HCS
CRCFUL
CRCEN
R/W-0
CRCEN: CRC Enable bit
1 = Module is enabled
0 = Module is enabled. All state machines, pointers and CRCWDAT/CRCDAT are reset;
Unimplemented: Read as ‘0’
CSIDL: CRC Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
VWORD<4:0>: Pointer Value bits
Indicates the number of valid words in the FIFO. Has a maximum value of 8 when PLEN<3:0> > 7, or
16 when PLEN<3:0> 7.
CRCFUL: FIFO Full bit
1 = FIFO is full
0 = FIFO is not full
CRCMPT: FIFO Empty Bit
1 = FIFO is empty
0 = FIFO is not empty
CRCISEL: CRC interrupt Selection bit
1 = Interrupt on FIFO is empty; CRC calculation is not complete
0 = Interrupt on shift is complete and CRCWDAT result is ready
CRCGO: Start CRC bit
1 = Start CRC serial shifter
0 = CRC serial shifter is turned off
LENDIAN: Data Shift Direction Select bit
1 = Data word is shifted into the CRC, starting with the LSb (little endian)
0 = Data word is shifted into the CRC, starting with the MSb (big endian)
Unimplemented: Read as ‘0’
R-1, HCS
CRCMPT
U-0
other SFRs are NOT reset
CRCCON1: CRC CONTROL REGISTER 1
HC = Hardware Clearable bit
W = Writable bit
‘1’ = Bit is set
CRCISEL
CSIDL
R/W-0
R/W-0
R/W-0, HC
VWORD4
CRCGO
R-0
HCS = Hardware Clearable/Settable bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
VWORD3
LENDIAN
R/W-0
R-0
VWORD2
R-0
U-0
 2011 Microchip Technology Inc.
x = Bit is unknown
VWORD1
R-0
U-0
VWORD0
R-0
U-0
bit 8
bit 0

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