CP82C52 Intersil, CP82C52 Datasheet - Page 6

• Manufacturer Part Number: CP82C52
• Manufacturer: Intersil

Specifications of CP82C52

• Transmitter And Receiver Fifo Counter: No
• Operating Supply Voltage (typ): 5V
• Package Type: PDIP
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Mounting: Through Hole
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Supply Current: 4mA
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Not Compliant

The Prescaler design has been optimized to provide
standard baud rates using any one of three popular crystal
frequencies. By using one of these common system clock
frequencies, 1.8432MHz, 2.4576MHz or 3.072MHz and
Prescaler divide ratios of ÷3, ÷4, or ÷5 respectively, the
Prescaler output will provide a constant 614.4KHz. When
this frequency is further divided by the Divisor Select
counter, any of the standard baud rates from 50 Baud to
38.4Kbaud can be selected (see Table 2). Non-standard
baud rates up to 1Mbaud can be selected by using different
input frequencies (crystal or an external frequency input up
to 16MHz) and/or different Prescaler and Divisor Select
ratios.
Regardless of the baud rate, the baud rate generator
provides a clock which is 16 times the desired baud rate. For
example, in order to operate at a 1Mbaud data rate, a
16MHz crystal, a Prescale rate of ÷1, and a Divisor Select
rate of “external” would be used. This would provide a
16MHz clock as the output of the Baud Rate Generator to
the Transmitter and Receiver circuits.
The CO select bit in the BRSR selects whether a buffered
version of the external frequency input (IX input) or the Baud
Rate Generator output (16x baud rate clock) will be output
on the CO output (pin 21). The Baud Rate Generator output
will always be a 50% nominal duty cycle except when
“external” is selected and the Prescaler is set to ÷3 or ÷5.
D7 D6 D5 D4 D3 D2 D1 D0
FIGURE 2. BRSR
6
Prescaler
Select
Divisor
Select
CO
Select
00 = ÷ 1
01 = ÷ 3
10 = ÷ 4
11 = ÷ 5
00000 = ÷ 2
00001 = ÷ 4
00010 = ÷ 16/3
00011 = ÷ 8
00100 = ÷ 32/3
00101 = ÷ 16
00110 = ÷ 58/3
00111 = ÷ 22
01000 = ÷ 32
01001 = ÷ 64
01010 = ÷ 128
01011 = ÷ 192
01100 = ÷ 256
01101 = ÷ 288
01110 = ÷ 352
01111 = ÷ 512
10000 = ÷ 768
11111 = External (÷ 1)
0 = IX Output
1 = Brg Output (On
Reset, D7 (CO Select)
is Reset to 0)
82C52
82C52
NOTE: These baud rates are based upon the following input
† All baud rates are exact except for:
Modem Control Register
The MCR is a general purpose control register which can be
written to and read from. The RTS and DTR outputs are
directly controlled by their associated bits in this register.
Note that a logic one asserts a true logic level (low) at these
output pins. The Interrupt Enable (INTEN) bit is the overall
control for the INTR output pin. When INTEN is false, INTR
is held false (low).
The Operating Mode bits configure the 82C52 into one of
four possible modes. “Normal” configures the 82C52 for
normal full or half duplex communications. “Transmit Break”'
enables the transmitter to only transmit break characters
(Start, Data and Stop bits all are logic zero). The Echo Mode
causes any data that is received on the SDI input pin to be
retransmitted on the SDO output pin. Note that this output is
BAUD RATE
134.5
1800
2000
110
frequency/ Prescale divisor combinations.
1.8432MHz and Prescale = ÷ 3
2.4576MHz and Prescale = ÷ 4
3.072MHZ and Prescale = ÷ 5
BAUD RATE
134.5†
2000†
1800†
38.4K
19.2K
9600
7200
4800
3600
2400
1200
110†
600
300
200
150
75
50
ACTUAL
1745.45
1986.2
133.33
109.09
TABLE 2.
PERCENT ERROR
DIVISOR
External
16/3
32/3
58/3
128
192
256
288
352
512
768
16
22
32
64
2
4
8
3.03%
0.69%
0.87%
0.83%
April 26, 2006
FN2950.3