SC16C550IN40 NXP Semiconductors, SC16C550IN40 Datasheet - Page 16

• Manufacturer Part Number: SC16C550IN40
• Manufacturer: NXP Semiconductors

Specifications of SC16C550IN40

• Transmit Fifo: 16Byte
• Receive Fifo: 16Byte
• Transmitter And Receiver Fifo Counter: Yes
• Package Type: PDIP
• Operating Supply Voltage (max): 5.5V
• Mounting: Through Hole
• Pin Count: 40
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
9397 750 11619
Product data
6.8 DMA operation
Table 5:
The SC16C550 FIFO trigger level provides additional flexibility to the user for block
mode operation. The user can optionally operate the transmit and receive FIFOs in
the DMA mode (FCR[3]). The DMA mode affects the state of the RXRDY and TXRDY
output pins. Tables
Table 6:
Table 7:
Using 1.8432 MHz crystal
Desired
baud rate
50
75
110
134.5
150
300
600
1200
1800
2000
2400
3600
4800
7200
9600
19200
38400
56000
Non-DMA mode
1 = FIFO empty
0 = at least 1 byte in FIFO
Non-DMA mode
1 = at least 1 byte in FIFO
0 = FIFO empty
Baud rates using 1.8432 MHz or 3.072 MHz crystal
Effect of DMA mode on state of RXRDY pin
Effect of DMA mode on state of TXRDY pin
Divisor for
16 clock
2304
1536
1047
857
768
384
192
96
64
58
48
32
24
16
12
6
3
2
Rev. 05 — 19 June 2003
6
and
7
show this.
Baud rate
error
0.026
0.058
0.69
2.86
UART with 16-byte FIFO and IrDA encoder/decoder
DMA mode
0-to-1 transition when FIFO empties
1-to-0 transition when FIFO reaches trigger level,
or time-out occurs
DMA mode
1 = FIFO is full
0 = FIFO has at least 1 empty location
Using 3.072 MHz crystal
Desired
baud rate
50
75
110
134.5
150
300
600
1200
1800
2000
2400
3600
4800
7200
9600
19200
38400
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Divisor for
16 clock
3840
2560
1745
1428
1280
640
320
160
107
96
80
53
40
27
20
10
5
SC16C550
Baud rate
error
0.026
0.034
0.312
0.628
1.23
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