SAA7129HV1 NXP Semiconductors, SAA7129HV1 Datasheet - Page 30

• Manufacturer Part Number: SAA7129HV1
• Manufacturer: NXP Semiconductors

Specifications of SAA7129HV1

• Adc/dac Resolution: 10b
• Screening Level: Commercial
• Package Type: PQFP
• Pin Count: 44
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
9397 750 14325
Product data sheet
Table 56:
Table 57:
Table 58:
Table 59:
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
PHRES1
0
0
1
1
LDEL1
0
0
1
1
Subaddress 6Dh
Subaddress 6Eh
Selection of phase reset mode
Selection of luminance path delay
Symbol
HTRIG10
HTRIG9
HTRIG8
VTRIG4
VTRIG3
VTRIG2
VTRIG1
VTRIG0
Symbol
SBLBN
BLCKON
PHRES1
PHRES0
LDEL1
LDEL0
FLC1
FLC0
PHRES0
0
1
0
1
LDEL0
0
1
0
1
Rev. 03 — 9 December 2004
Description
these are the 3 MSBs of the horizontal trigger phase code; see
sets the vertical trigger phase related to signal on RCV1 input; increasing
VTRIG decreases delays of all internally generated timing signals,
measured in half lines; variation range of VTRIG[4:0] = 0 to 31 (1Fh)
Description
0 = vertical blanking is defined by programming of FAL and LAL; default
state after reset,
1 = vertical blanking is forced in accordance with ITU-R BT.624 (50 Hz) or
RS170A (60 Hz).
0 = encoder in normal operation mode,
1 = output signal is forced to blanking level; default state after reset.
these 2 bits select the phase reset mode of the color subcarrier
generator; see
these 2 bits select the delay on luminance path with reference to
chrominance path; see
these 2 bits select field length control; see
Description
no reset or reset via RTCI from SAA7113 or SAA7118 if bit RTCE = 1;
default value after reset
reset every two lines or SECAM specific if bit SECAM = 1
reset every eight fields
reset every four fields
Luminance path delay
no luminance delay; default value after reset
1 LLC luminance delay
2 LLC luminance delay
3 LLC luminance delay
Table 58
SAA7128H; SAA7129H
Table 59
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Table 60
Digital video encoder
Table 55
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