SAA7129HV1 NXP Semiconductors, SAA7129HV1 Datasheet - Page 5

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SAA7129HV1

Manufacturer Part Number
SAA7129HV1
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7129HV1

Adc/dac Resolution
10b
Screening Level
Commercial
Package Type
PQFP
Pin Count
44
Lead Free Status / RoHS Status
Compliant
Philips Semiconductors
Table 3:
9397 750 14325
Product data sheet
Symbol
MP7
MP6
MP5
MP4
MP3
MP2
MP1
MP0
V
V
RTCI
V
SA
V
RED
C
V
GREEN
VBS
V
BLUE
CVBS
V
V
V
XTALO
XTALI
V
XCLK
V
V
RESET_N 40
SCL
SDA
TTXRQ
TTX
DDD2
SSD2
DD(I2C)
SSA1
DDA1
DDA2
DDA3
SSA2
SSA3
DDA4
SSD3
DDD3
Pinning
Pin
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
41
42
43
44
…continued
Type
I
I
I
I
I
I
I
I
supply
supply
I
supply
I
supply
O
O
supply
O
O
supply
O
O
supply
supply
supply
O
I
supply
O
supply
supply
I
I/(O)
I/O
O
I
Description
double-speed 54 MHz MPEG port; it is an input for ITU-R BT.656 style multiplexed
C
rising edge is then sent to the encoding part of the device; data sampled on the falling
edge is sent to the RGB part of the device (or vice versa, depending on programming)
digital supply voltage 2
digital ground 2
real-time control input; if the LLC1 clock is provided by an SAA7113 or SAA7118, RTCI
should be connected to the RTCO pin of the respective decoder to improve the signal
quality
sense input for I
select I
8Ch
analog ground 1 for RED (C
analog output of RED (C
analog output of chrominance (CVBS) signal
analog supply voltage 1 for RED (C
analog output of GREEN (Y) signal
analog output of VBS (CVBS) signal
analog supply voltage 2 for VBS (CVBS) and GREEN (Y) outputs
analog output of BLUE (C
analog output of CVBS (CSYNC) signal
analog supply voltage 3 for BLUE (C
analog ground 2 for VBS (CVBS), BLUE (C
analog ground 3 for the DAC reference ladder and the oscillator
crystal oscillator output
crystal oscillator input; if the oscillator is not used, this pin should be connected to
ground
analog supply voltage 4 for the DAC reference ladder and the oscillator
clock output of the crystal oscillator
digital ground 3
digital supply voltage 3
Reset input, active LOW. After reset is applied, all digital I/Os are in input mode; PAL
black burst on CVBS, VBS and C; RGB outputs set to lowest voltage. The I
receiver waits for the START condition.
serial clock input (I
serial data input/output (I
teletext request output, indicating when text bits are requested
teletext bit stream input
R
-Y-C
B
2
C-bus address; LOW selects slave address 88h, HIGH selects slave address
data; data is sampled on the rising and falling clock edge; data sampled on the
Rev. 03 — 9 December 2004
2
C-bus voltage; connect to I
2
C-bus) with inactive output path
R
2
B
) signal
C-bus)
) signal
R
), C (CVBS) and GREEN (Y) outputs
SAA7128H; SAA7129H
R
) and C (CVBS) outputs
B
) and CVBS (CSYNC) outputs
B
2
) and CVBS (CSYNC) outputs
C-bus supply
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Digital video encoder
2
C-bus
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