MT48LC2M32B2P-6:G Micron Technology Inc, MT48LC2M32B2P-6:G Datasheet - Page 34

IC, SDRAM, 64MBIT, 166MHZ, TSOP-86

MT48LC2M32B2P-6:G

Manufacturer Part Number
MT48LC2M32B2P-6:G
Description
IC, SDRAM, 64MBIT, 166MHZ, TSOP-86
Manufacturer
Micron Technology Inc
Type
SDRAMr
Series
-r
Datasheets

Specifications of MT48LC2M32B2P-6:G

Organization
2Mx32
Density
64Mb
Address Bus
13b
Access Time (max)
17/7.5/5.5ns
Maximum Clock Rate
166MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
180mA
Pin Count
86
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Memory Type
DRAM - Sychronous
Access Time
5.5ns
Page Size
64Mbit
Memory Case Style
TSOP
No. Of Pins
86
Operating Temperature Range
0°C To +70°C
Frequency
166MHz
Supply Voltage
3.3V
Format - Memory
RAM
Memory Size
64M (2Mx32)
Speed
167MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
86-TFSOP (0.400", 10.16mm Width)
Filter Terminals
SMD
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Compliant
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT48LC2M32B2P-6:G
Quantity:
106
Part Number:
MT48LC2M32B2P-6:G
Manufacturer:
MICRON
Quantity:
20 000
Figure 27:
Figure 28:
Concurrent Auto Precharge
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
64MSDRAM_2.fm - Rev. M 10/07 EN
Clock Suspend During WRITE Burst
Clock Suspend During READ Burst
Note:
COMMAND
COMMAND
An access command (READ or WRITE) to another bank while an access command with
auto precharge enabled is executing is not allowed by SDRAMs, unless the SDRAM
supports concurrent auto precharge. Micron SDRAMs support concurrent auto
precharge. Four cases where concurrent auto precharge occurs are defined below.
INTERNAL
INTERNAL
ADDRESS
ADDRESS
CLOCK
CLOCK
For this example, CL = 2, BL = 4 or greater, and DQM is LOW.
CLK
CKE
CLK
CKE
D
DQ
IN
T0
NOP
BANK,
READ
COL n
T0
WRITE
BANK,
COL n
T1
T1
D
NOP
n
IN
TRANSITIONING DATA
T2
T2
NOP
34
D
OUT
n
TRANSITIONING DATA
T3
T3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
n + 1
D
OUT
NOP
n + 1
T4
T4
D
NOP
IN
DON’T CARE
T5
T5
n + 2
NOP
D
NOP
IN
n + 2
D
OUT
64Mb: x4, x8, x16 SDRAM
DON’T CARE
T6
NOP
D
n + 3
OUT
©2000 Micron Technology, Inc. All rights reserved.
Commands

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