ISP1161A1BM,557 NXP Semiconductors, ISP1161A1BM,557 Datasheet - Page 112

• Manufacturer Part Number: ISP1161A1BM,557
• Manufacturer: NXP Semiconductors

Specifications of ISP1161A1BM,557

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
9397 750 13961
Product data
Fig 47. Oscillator and LazyClock logic.
Fig 48. CLKOUT signal timing at ‘suspend’ and ‘resume’ for DC.
If enabled, the 100 50 % kHz LazyClock frequency will be output on pin CLKOUT during ‘suspend’ state.
D_SUSPEND
D_WAKEUP
GOSUSP
CLKDIV [ 3:0 ]
CLKOUT
configuration
CLKRUN
NOLAZY
hardware
register
.
.
.
.
.
.
SUSPEND
The following bits are involved:
For details about the DC’s interrupt logic, see
When the ISP1161A1’s DC enters the ‘suspend’ state (by setting and clearing
bit GOSUSP in the DcMode register), outputs D_SUSPEND and CLKOUT change
state after approximately 2 ms delay. When NOLAZY = 0 the clock signal on output
CLKOUT does not stop, but changes to the 100 kHz
When resuming from ‘suspend’ state by a positive pulse on input D_WAKEUP, output
SUSPEND is cleared and the clock signal on CLKOUT restarted after a 0.5 ms delay.
The timing of the CLKOUT signal at ‘suspend’ and ‘resume’ is given in
•
•
•
CLKRUN switches the oscillator on and off
CLKDIV[3:0] is the division factor determining the normal CLKOUT frequency
NOLAZY controls the LazyClock signal output during ‘suspend’ state.
1.8 to 2.2 ms
Rev. 03 — 23 December 2004
XTAL OSC
4
enable
6 MHz
LAZYCLOCK
PLL 8
enable
enable
USB single-chip host and device controller
48 MHz
100 (±50 %) kHz
Section
0.5 ms
(N + 1)
N
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.6.3.
50 % LazyClock frequency.
PLL circuit stable
MGS775
3 to 4 ms
1
0
ISP1161A1
NOLAZY
CLKOUT
004aaa038
Figure
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48.