LSI53CF92A-64QFP LSI, LSI53CF92A-64QFP Datasheet - Page 63

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LSI53CF92A-64QFP

Manufacturer Part Number
LSI53CF92A-64QFP
Description
Manufacturer
LSI
Datasheet

Specifications of LSI53CF92A-64QFP

Lead Free Status / RoHS Status
Supplier Unconfirmed
Register: 0x04
Destination Bus ID
Write Only
Register Bank 0 or 1
The least significant three bits of this register specify the encoded
destination bus ID for a selection or reselection command. These bits are
binary encoded, with 000 0111 representing device ID 7, which appears
as 0x80 on the SCSI bus. The most significant five bits are reserved. The
destination ID is not changed by any reset; the states of these bits are
unpredictable after power-up.
Standard Register Set
Copyright © 1995–2002 by LSI Logic Corporation. All rights reserved.
7
x
x
latched only if the Features Enable bit (bit 6) is set in the
Configuration 2 (Config 2)
is reopened when the Interrupt register is read.
2
0
0
0
0
1
1
1
1
1
0
0
1
1
0
0
1
1
Bits
R
x
0
0
1
0
1
0
1
0
1
x
Default
SCSI Bus Phase
Data Out
Data In
Command
Status
Reserved
Reserved
Message Out
Message In
3
x
register. The transparent latch
ID2
2
x
ID1
1
x
ID0
0
x
4-13

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