82V3355DKG IDT, Integrated Device Technology Inc, 82V3355DKG Datasheet - Page 110

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82V3355DKG

Manufacturer Part Number
82V3355DKG
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 82V3355DKG

Function
Wan PLL
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
TQFP
Pin Count
64
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
6.2.10
SYNC_MONITOR_CNFG - Sync Monitor Configuration
Programming Information
IDT82V3355
Address:7CH
Type: Read / Write
Default Value: 00101011
SYNC_BYPASS
6 - 4
3 - 0
Bit
7
7
SYNCHRONIZATION CONFIGURATION REGISTERS
SYNC_MON_LIMT[2:0]
SYNC_BYPASS
SYNC_MON_LIMT2
Name
-
6
This bit selects one frame sync input signal to synchronize the frame sync output signals.
0: EX_SYNC1 is selected. (default)
1: When the T0 selected input clock is IN1_CMOS or IN1_DIFF, EX_SYNC1 is selected; when the T0 selected input clock
is IN2_CMOS or IN2_DIFF, EX_SYNC2 is selected; when the T0 selected input clock is IN3_CMOS, EX_SYNC3 is
selected; when there is no T0 selected input clock, no frame sync input signal is selected.
These bits set the limit for the external sync alarm.
000: ±1 UI.
001: ±2 UI.
010: ±3 UI. (default)
011: ±4 UI.
100: ±5 UI.
101: ±6 UI.
110: ±7 UI.
111: ±8 UI.
These bits must be set to ‘1011’.
SYNC_MON_LIMT1
5
SYNC_MON_LIMT0
110
4
Description
3
-
SYNCHRONOUS ETHERNET WAN PLL
2
-
1
-
March 3, 2009
0
-

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