SSTUA32866EC/G-T NXP Semiconductors, SSTUA32866EC/G-T Datasheet - Page 21

• Manufacturer Part Number: SSTUA32866EC/G-T
• Manufacturer: NXP Semiconductors

Specifications of SSTUA32866EC/G-T

• Logic Family: SSTU
• Logical Function: Registered Buffer
• Number Of Elements: 1
• Number Of Bits: 25
• Number Of Inputs: 25
• Number Of Outputs: 25
• High Level Output Current: -8mA
• Low Level Output Current: 8mA
• Propagation Delay Time: 3ns
• Operating Supply Voltage (typ): 1.8V
• Operating Supply Voltage (max): 2V
• Operating Supply Voltage (min): 1.7V
• Clock-edge Trigger Type: Posit/Negat-Edge
• Polarity: Non-Inverting
• Technology: CMOS
• Frequency (max): 450(Min)MHz
• Mounting: Surface Mount
• Pin Count: 96
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
SSTUA32866_2
Product data sheet
Fig 26. Partial parity out voltage waveforms; propagation delay times with respect to
V
t
V
V
RESET input
PLH
T
IH
IL
= 0.5V
= V
= V
and t
ref
ref
PHL
DD
+ 250 mV (AC voltage levels) for differential inputs. V
250 mV (AC voltage levels) for differential inputs. V
.
are the same as t
Rev. 02 — 26 March 2007
RESET
output
1.8 V DDR2-667 configurable registered buffer with parity
LVCMOS
PD
.
0.5V
t
PHL
DD
V
T
002aaa376
IL
IH
= V
= V
V
V
V
V
SSTUA32866
IH
IL
OH
OL
DD
DD
for LVCMOS inputs.
for LVCMOS inputs.
© NXP B.V. 2007. All rights reserved.
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