PCK9447BD,157 NXP Semiconductors, PCK9447BD,157 Datasheet - Page 9

• Manufacturer Part Number: PCK9447BD,157
• Description: IC FANOUT BUFFER 1:9 32LQFP
• Manufacturer: NXP Semiconductors
• Type: Fanout Buffer (Distribution), Multiplexerr

Specifications of PCK9447BD,157

• Number Of Circuits: 1
• Ratio - Input:output: 2:9
• Differential - Input:output: No/No
• Input: LVCMOS
• Output: LVCMOS
• Frequency - Max: 350MHz
• Voltage - Supply: 2.375 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Frequency-max: 350MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-3565; 935280283157; PCK9447BD

Philips Semiconductors
9. Application information
9397 750 12522
Product data sheet
9.1 Driving transmission lines
The PCK9447 clock driver was designed to drive high-speed signals in a terminated
transmission line environment. To provide the optimum flexibility to the user the output
drivers were designed to exhibit the lowest impedance possible. With an output
impedance of 17
parallel or series terminated transmission lines.
In most high performance clock networks, point-to-point distribution of signals is the
method of choice. In a point-to-point scheme, either series terminated or parallel
terminated transmission lines can be used. The parallel technique terminates the signal at
the end of the line with a 50
of DC current, and thus only a single terminated line can be driven by each output of the
PCK9447 clock driver. For the series terminated case, however, there is no DC current
draw, thus the outputs can drive multiple series terminated lines.
output driving a single series terminated line versus two series terminated lines in parallel.
When taken to its extreme, the fan-out of the PCK9447 clock driver is effectively doubled
due to its capability to drive multiple lines.
The waveform plots of
versus two lines. In both cases the drive capability of the PCK9447 output buffer is more
than sufficient to drive 50
measurement in the simulations a delta of only 43 ps exists between the two differently
loaded outputs. This suggests that the dual line driving need not be used exclusively to
maintain the tight output-to-output skew of the PCK9447. The output waveform in
Figure 12
seen looking into the driver. The parallel combination of the 33
output impedance does not match the parallel combination of the line impedances. The
voltage wave launched down the two lines will equal:
V
Fig 11. Single versus dual transmission lines
L
=
V
S
------------------------------- -
R
shows a step in the waveform; this step is caused by the impedance mismatch
S
+
Z
R
O
O
+
(V
Z
IN
IN
0
Rev. 01 — 13 October 2005
CC
Figure 12
= 3.3 V) or 19
transmission lines on the incident edge. Note from the delay
PCK9447
PCK9447
OUTPUT
BUFFER
OUTPUT
BUFFER
resistance to V
show simulation results of an output driving a single line
17
17
R S = 33
R S = 33
R S = 33
3.3 V/2.5 V 1 : 9 LVCMOS clock fan-out buffer
(V
CC
CC
= 2.5 V), the outputs can drive either
/2. This technique draws a fairly high level
Z o = 50
Z o = 50
Z o = 50
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
002aaa718
OutA
OutB0
OutB1
Figure
series resistor plus the
PCK9447
11, illustrates an
9 of 17