EL4584CSZ Intersil, EL4584CSZ Datasheet

IC PLL VIDEO GP 36MHZ 16-SOIC

EL4584CSZ

Manufacturer Part Number
EL4584CSZ
Description
IC PLL VIDEO GP 36MHZ 16-SOIC
Manufacturer
Intersil
Type
Phase Lock Loop (PLL)r
Datasheet

Specifications of EL4584CSZ

Pll
Yes
Input
Clock
Output
CMOS, TTL
Number Of Circuits
1
Ratio - Input:output
3:1
Differential - Input:output
No/No
Frequency - Max
36MHz
Divider/multiplier
Yes/No
Voltage - Supply
5V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Frequency-max
36MHz
Pll Type
Clock Generation
Frequency
36MHz
Supply Current
2mA
Supply Voltage Range
5V
Digital Ic Case Style
SOIC
No. Of Pins
16
Operating Temperature Range
-40°C To +85°C
Bandwidth
36MHz
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Horizontal Genlock, 4F
The EL4584 is a PLL (Phase Lock Loop) sub system,
designed for video applications but also suitable for general
purpose use up to 36MHz. In video applications, this device
generates a TTL/CMOS compatible Pixel Clock (CLK OUT)
which is a multiple of the TV horizontal scan rate and phase
locked to it.
The reference signal is a horizontal sync signal, TTL/CMOS
format, which can be easily derived from an analog
composite video signal with the EL4583 Sync Separator. An
input signal to “coast” is provided for applications where
periodic disturbances are present in the reference video
timing, such as VTR head switching. The Lock detector
output indicates correct lock.
The divider ratio is four ratios for NTSC and four similar
ratios for the PAL video timing standards, by external
selection of three control pins. These four ratios have been
selected for common video applications including 4F
3F
elements used in some workstation graphics. To generate
8F
EL4585, which includes an additional divide-by-two stage.
For applications where these frequencies are inappropriate
or for general purpose PLL applications, the internal divider
can be bypassed and an external divider chain used.
NOTES:
Divisor
PAL F
Divisor
NTSC F
1. 3F
2. CCIR 601 Divisors yield 720 pixels in the portion of each line for
3. Square pixels format gives 640 pixels for NTSC and 768 pixels
SC
SC
FUNCTION
NTSC and PAL.
for PAL in the active portion.
, 13.5MHz (CCIR 601 format) and square picture
, 6F
OSC
SC
OSC
numbers do not yield integer divisors.
SC
TABLE 1. FREQUENCIES AND DIVISORS
(MHz)
(MHz)
, 27MHz (CCIR 601 format) etc. use the
(Note 1)
13.301
10.738
3F
851
682
SC
®
CCIR 601
(Note 2)
1
13.5
13.5
864
858
SC
Data Sheet
SQUARE
(Note 3)
12.273
14.75
944
780
17.734
14.318
SC
4F
1135
910
1-888-INTERSIL or 1-888-468-3774
SC
,
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• 36MHz, general purpose PLL
• 4F
• Compatible with EL4583 sync separator
• VCXO, Xtal, or LC tank oscillator
• < 2ns jitter (VCXO)
• User controlled PLL capture and lock
• Compatible with NTSC and PAL TV formats
• 8 pre-programmed TV scan rate clock divisors
• Selectable external divide for custom ratios
• Single 5V, low current operation
• Pb-Free available (RoHS compliant)
Applications
• Pixel clock regeneration
• Video compression engine (MPEG) clock generator
• Video capture or digitization
• PIP (Picture-in-Picture) timing generator
• Text or graphics overlay timing
Ordering Information
Demo Board
A demo PCB is available for this product.
EL4584CN
EL4584CS*
EL4584CSZ*
(Note)
*Add “-T7” or “-T13” suffix for tape and reel. Please refer to TB347
for details on reel specifications.
**For 6F
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach
materials and 100% matte tin plate PLUS ANNEAL - e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
PART NUMBER
SC
SC
based timing (use the EL4585 for 8F
All other trademarks mentioned are the property of their respective owners.
|
and 8F
May 9, 2008
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003-2008. All Rights Reserved
SC
EL4584CN
EL4584CS
EL4584CSZ 16 Ld SOIC
MARKING
clock frequencies, see EL4585 datasheet.
PART
16 Ld PDIP MDP0031
16 Ld SOIC MDP0027
(Pb-free)
PACKAGE
MDP0027
EL4584
SC
FN7174.3
)
DWG. #
PKG.

Related parts for EL4584CSZ

EL4584CSZ Summary of contents

Page 1

... SC PART MARKING PACKAGE DWG. # EL4584CN 16 Ld PDIP MDP0031 EL4584CS 16 Ld SOIC MDP0027 EL4584CSZ 16 Ld SOIC MDP0027 (Pb-free) and 8F clock frequencies, see EL4585 datasheet Intersil (and design registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2003-2008. All Rights Reserved PKG. ...

Page 2

Pinout 2 EL4584 EL4584 (16 LD SOIC, PDIP) TOP VIEW 1 16 PROG B PROG PROG C CLK OUT 3 14 OSC/VCO OUT EXT DIVIDER V ( LOCK DETECT OSC/VCO IN ...

Page 3

... VCXO oscillator Jitter LC oscillator (Typ) NOTE: 5. Noisy video signal input to EL4583 EL4584 = +25°C) Oscillator Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36MHz Pin Voltages -0. Operating Ambient Temperature Range . . . . . . . . . .-40°C to +85°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp = 5V +25°C unless otherwise noted CONDITIONS = 5V (Note ...

Page 4

Pin Descriptions PIN NUMBER PIN NAME PROG B, PROG C, PROG A 3 OSC/VCO OUT 4 VDD (A) 5 OSC/VCO IN 6 VSS (A) 7 CHARGE PUMP OUT 8 DIV SELECT 9 COAST 10 HSYNC IN 11 ...

Page 5

Timing Diagrams FIGURE 1. PLL LOCKED CONDITION (PHASE ERROR = 0) 5 EL4584 200 200 FIGURE 2. OUT OF LOCK CONDITION FIGURE 3. TEST CIRCUIT 1 FALLING EDGE SYNC 200ns LOCKS TO RISING EDGE OF EXT DIV ...

Page 6

Typical Performance Curves FIGURE FIGURE 6. TYPICAL VARACTOR FIGURE 8. CHARGE PUMP DUTY CYCLE vs θ 6 EL4584 FIGURE 5. EL4584 OSC GAIN @ 20MHz vs TEMPERATURE OSC FIGURE 9. PACKAGE POWER DISSIPATION VS AMBIENT ...

Page 7

Typical Performance Curves FIGURE 10. PACKAGE POWER DISSIPATION VS AMBIENT TEMPERATURE Block Diagram Description Of Operation The horizontal sync signal (CMOS level, falling leading edge) is input to H input (pin 10). This signal is delayed SYNC about 200ns, the ...

Page 8

Crystal oscillators are more stable than LC oscillators, which translates into lower jitter, but LC oscillators can be pulled from their mid-point values further, resulting in a greater ...

Page 9

The resistance needed will depend on VCO design or VCXO module selection. Applications Information Choosing External Components 1. To choose LC VCO components, first pick the desired operating frequency. For our example, we will use 14.31818MHz, with an H frequency ...

Page 10

TABLE 4. XTAL VCO COMPONENT VALUES (APPROXIMATE) (Continued) FREQUENCY (MHz) (kΩ) (pF) 17.734 300 15 10.738 300 15 12.273 300 15 14.318 300 15 The above oscillators are arranged as Colpitts oscillators, and the structure is redrawn ...

Page 11

Diagrams” on page 5) increases, and if R increases, tθ decreases. For LDET to be low at 2 lock, |tθ| < used mainly to attenuate high 4 frequency noise from the charge ...

Page 12

FIGURE 18. VCXO Demo Board 12 EL4584 FIGURE 19. XTAL +5V FIGURE 20. LC TANK +5V FN7174.3 May 9, 2008 ...

Page 13

Component Sources Inductors • Dale Electronics E. Highway 50 PO Box 180 Yankton, SD 57078-0180 (605) 665-9301 Crystals, VCXO, VCO Modules • Connor-Winfield 2111 Comprehensive Drive Aurora, IL 60606 (708) 851-4722 • Piezo Systems 100 K Street PO Box 619 ...

Page 14

Small Outline Package Family (SO PIN #1 I.D. MARK 0.010 SEATING PLANE 0.004 C 0.010 MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) SYMBOL SO-8 SO-14 ...

Page 15

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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