LTC6992HS6-1#TRMPBF Linear Technology, LTC6992HS6-1#TRMPBF Datasheet - Page 14

• Manufacturer Part Number: LTC6992HS6-1#TRMPBF
• Description: IC TIMERBLOX VOLT PWM TSOT23-6
• Manufacturer: Linear Technology

Specifications of LTC6992HS6-1#TRMPBF

• Frequency: *
• Voltage - Supply: *
• Current - Supply: 365µA
• Operating Temperature: *
• Package / Case: TSOT-23-6, TSOT-6
• Count: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LTC6992HS6-1#TRMPBFTR

OPERATION
LTC6992-1/LTC6992-2/
LTC6992-3/LTC6992-4
The LTC6992 is built around a master oscillator with a
1MHz maximum frequency. The oscillator is controlled
by the SET pin current (I
1MHz • 50k conversion factor that is accurate to ±0.8%
under typical conditions.
A feedback loop maintains V
as the primary means of controlling the output frequency.
The simplest way to generate I
(R
The master oscillator equation reduces to:
From this equation, it is clear that V
the output frequency when using a single program resistor
(R
inherent frequency accuracy Δf
R
between 1.25μA and 20μA).
The LTC6992 includes a programmable frequency divider
which can further divide the frequency by 1, 4, 16, 64,
256, 1024, 4096 or 16384 before driving the OUT pin.
The divider ratio N
to the DIV pin.
With R
14
SET
SET
SET
f
f
f
f
MASTER
MASTER
OUT
OUT
) between SET and GND, such that I
). Error sources are limited to R
may range from 50k to 800k (equivalent to I
SET
=
=
t
t
in place of V
OUT
OUT
1
=
=
1
t
t
MASTER
MASTER
=
=
1MHz • 50k
N
1
1
1MHz • 50k
DIV
DIV
N
is set by a resistor divider attached
• R
DIV
SET
= 1MHz • 50k •
=
SET
1MHz • 50k
SET
/I
SET
SET
) and voltage (V
R
SET
SET
•
OUT
at 1V ±30mV, leaving I
the equation reduces to:
V
I
SET
SET
is to connect a resistor
SET
of the LTC6992.
SET
drift will not affect
V
I
tolerance and the
SET
SET
SET
= V
SET
SET
), with a
/R
SET
SET
SET
.
DIVCODE
The DIV pin connects to an internal, V
converter that determines the DIVCODE value. DIVCODE
programs two settings on the LTC6992:
1. DIVCODE determines the output frequency divider set-
2. DIVCODE determines the output polarity, via the POL
V
and GND as shown in Figure 1.
Table 1 offers recommended 1% resistor values that ac-
DIV
ting, N
bit.
may be generated by a resistor divider between V
Figure 1. Simple Technique for Setting DIVCODE
DIV
.
LTC6992
GND
6992 F01
DIV
V
+
2.25V TO 5.5V
R1
R2
+
referenced 4-bit A/D
69921234f
+