M41T56M6F STMicroelectronics, M41T56M6F Datasheet - Page 24

IC RTC SRL 512BIT 8SOIC

M41T56M6F

Manufacturer Part Number
M41T56M6F
Description
IC RTC SRL 512BIT 8SOIC
Manufacturer
STMicroelectronics
Type
Clock/Calendar/NVSRAMr
Datasheet

Specifications of M41T56M6F

Memory Size
56B
Time Format
HH:MM:SS (24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Function
Clock, Calendar
Rtc Memory Size
64 B
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Rtc Bus Interface
Serial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-4706-2

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M41T56M6F
Manufacturer:
ST
0
Part Number:
M41T56M6F
Manufacturer:
ST
Quantity:
20 000
Part Number:
M41T56M6FTR
Manufacturer:
ST
0
9
24/25
Revision history
Table 13.
23-Dec-1999
21-Mar-2000
30-Nov-2000
02-Aug-2002
07-Nov-2002
11-Sep-2006
06-Nov-2007
13-Dec-2007
25-Jan-2001
16-Feb-2001
15-Jun-2004
06-Apr-2001
09-Oct-2006
10-Apr-2007
17-Jul-2001
Mar-1999
Date
Document revision history
Revision
1.0
1.1
1.2
1.3
1.4
2.0
2.1
2.2
2.3
2.4
3.0
4
5
6
7
8
First issue
SOH28 package added
Series resistance max value changed
Added PSDIP8 package
Corrected graphic, measurements of PSDIP8 (Figure 18, Table 14)
Reformatted, table added
Add temp./voltage information to characteristics
series resistance
Basic formatting changes
Modify reflow time and temperature footnote
electrical characteristics table footnotes
package
Correct figure name
Reformatted; add lead-free information; update characteristics
Table
Changed document to new template; amalgamated diagrams in
on page
mechanical data in
changes for entire document, removed lead packages from
ECOPACK compliant
Updated package mechanical data in
package
Updated package information references that only SO8 available (cover
page,
Added lead-free second level interconnect information to cover page and
Section 6: Package mechanical
Table
Updated cover page and
4,
8; addition of
Section
Table
1; amended footnotes in
outline.
12)
1,
Section
(Table
Section 6: Package mechanical
Section 8:
(Features on page
8)
4,
Section 8:
(Table
Table
References.
Changes
data; updated
16).
Table 3: Register
4,
References.
Table
Figure 15.: SO8 – 8-pin plastic small
(Table
1)
(Table
8, and
(Table
8)
Table
8); removed PSDIP8
(Table
Table
map; updated Package
4); modify crystal
data; small text
4, footnote 1 in
7,
12).
Table
Table
(Figure
2); correct
Features
12,
11;

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