ISL12027IBZ-T Intersil, ISL12027IBZ-T Datasheet - Page 6

• Manufacturer Part Number: ISL12027IBZ-T
• Description: IC RTC/CALENDAR EEPROM 8-SOIC
• Manufacturer: Intersil
• Type: Clock/Calendar/Supervisor/EEPROMr

Specifications of ISL12027IBZ-T

• Memory Size: 4K (512 x 8)
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ISL12027IBZ-TTR

Serial Interface (I
NOTES:
10. Bit BSW = 0 (Standard Mode), ATR = 00h, V
12. In order to ensure proper timekeeping, the V
13. Parameter is not 100% tested.
14. t
15. These are I
16. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
11. Specified at +25°C.
SYMBOL
7. RESET Inactive (no reset).
8. V
9. V
t
t
t
t
t
t
HD:STO
HD:STA
SU:DAT
HD:DAT
SU:STO
SU:STA
Cpin
R
t
t
sequence of a serial interface Write operation, to the end of the self-timed internal non-volatile write cycle.
characterization and are not production tested.
Cb
WC
DH
t
t
WC
t
t
PU
R
R
F
F
IL
RESET
= V
is the minimum cycle time to be allowed for any non-volatile Write by the user, it is the time from valid STOP condition at the end of Write
DD
START Condition Set-up Time
START Condition Hold Time
Input Data Set-up Time
Input Data Hold Time
STOP Condition Set-up Time
STOP Condition Hold Time for
Read, or Volatile Only Write
Output Data Hold Time
SDA and SCL Rise Time
SDA and SCL Fall Time
SDA, and SCL Pin Capacitance
Non-Volatile Write Cycle Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Capacitive Loading of SDA or SCL Total on-chip and off-chip
SDA and SCL Bus Pull-up Resistor
Off-chip
= 2.63V (V
x 0.1, V
2
C specific parameters and are not directly tested, however they are used during device testing to validate device specification.
IH
2
PARAMETER
DD
C) Specifications
= V
must be greater than V
DD
x 0.9, f
6
SCL
= 400kHz.
(Continued)
BAT
DD SR-
SCL rising edge to SDA falling edge.
Both crossing 70% of V
From SDA falling edge crossing 30%
of V
70% of V
From SDA exiting the 30% to 70% of
V
crossing 30% of V
From SCL falling edge crossing 70% of
V
of V
From SCL rising edge crossing 70% of
V
of V
From SDA rising edge to SCL falling
edge. Both crossing 70% of V
From SCL falling edge crossing 30% of
V
of V
From 30% to 70% of V
From 70% to 30% of V
From 30% to 70% of V
From 70% to 30% of V
Maximum is determined by t
For Cb = 400pF, max is about
2kΩ~2.5kΩ.
For Cb = 40pF, max is about
15kΩ~20kΩ
RESET
DD
DD
DD
DD
≥1.8V.
DD
DD
DD
DD
, to SDA rising edge crossing 30%
, until SDA enters the 30% to 70%
window, to SCL rising edge
to SDA entering the 30% to 70%
specification must be followed.
ISL12027, ISL12027A
.
), V
to SCL falling edge crossing
window.
window.
DD
BAT
.
CONDITIONS
= 0V.
DD
.
DD
DD
DD
DD
DD
.
R
DD
and t
.
F
.
0.1xCb
0.1xCb
0.1xCb
0.1xCb
20 +
20 +
20 +
20 +
MIN
600
600
100
600
600
10
0
0
1
TYP
12
MAX
250
250
250
250
400
10
20
UNITS
ms
kΩ
pF
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
August 12, 2010
NOTES
FN8232.8
14
15
15
15
15