ISL12027IV30AZ Intersil, ISL12027IV30AZ Datasheet - Page 9

• Manufacturer Part Number: ISL12027IV30AZ
• Description: IC RTC/CALENDAR EEPROM 8-TSSOP
• Manufacturer: Intersil
• Type: Clock/Calendar/Supervisor/EEPROMr

Specifications of ISL12027IV30AZ

• Memory Size: 4K (512 x 8)
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP
• Bus Type: Serial (I2C)
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Pin Count: 8
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Description
The ISL12027 device is a Real Time Clock with
clock/calendar, two polled alarms with integrated 512x8
EEPROM configured in 16 Byte per page format, oscillator
compensation, CPU Supervisor (Power on Reset, Low
Voltage Sensing and Watchdog Timer) and battery backup
switch.
The oscillator uses an external, low-cost 32.768kHz crystal.
All compensation and trim components are integrated on the
chip. This eliminates several external discrete components
and a trim capacitor, saving board area and component cost.
The Real-Time Clock keeps track of time with separate
registers for Hours, Minutes and Seconds. The Calendar has
separate registers for Date, Month, Year and Day-of-week.
The calendar is correct through 2099, with automatic leap
year correction.
The Dual Alarms can be set to any Clock/Calendar value for
a match. For instance, every minute, every Tuesday, or 5:23
AM on March 21. The alarms can be polled in the Status
Register. There is a repeat mode for the alarms allowing a
periodic interrupt.
The ISL12027 device integrates CPU Supervisory functions
(POR, WDT) and Battery Switch. There is Power-On-Reset
(RESET) output with 250ms delay from power on. It will also
assert RESET when V
threshold. The V
VTS0 registers to five (5) preselected levels. There is
Watchdog Timer (WDT) with 3 selectable time-out periods
(0.25s, 0.75s and 1.75s) and disabled setting. The
Watchdog Timer activates the RESET pin when it expires.
The device offers a backup power input pin. This V
allows the device to be backed up by battery or SuperCap.
The entire ISL12027 device is fully operational from 2.7V to
5.5V and the clock/calendar portion of the ISL12027 device
remains fully operational down to 1.8V (Standby Mode).
The ISL12027 device provides 4k bits of EEPROM with
8 modes of BlockLock™ control. The BlockLock™ allows a
safe, secure memory for critical user and configuration data,
while allowing a large user storage area.
Pin Descriptions
Serial Clock (SCL)
The SCL input is used to clock all data into and out of the
device. The input buffer on this pin is always active (not
gated). The pull-up resistor on this pin must use the same
voltage source as V
Serial Data (SDA)
SDA is a bi-directional pin used to transfer data into and out
of the device. It has an open drain output and may be wire
ORed with other open drain or open collector outputs. The
input buffer is always active (not gated).
trip
DD
threshold is selectable via VTS2/VTS1/
DD
.
goes below the specified
9
ISL12027, ISL12027A
BAT
pin
This open drain output requires the use of a pull-up resistor.
The pull-up resistor on this pin must use the same voltage
source as V
the output signal with the use of a slope controlled
pull-down. The circuit is designed for 400kHz I
speed.
V
This input provides a backup supply voltage to the device.
V
supply fails. This pin can be connected to a battery, a
SuperCap or tied to ground if not used.
Note that the device is not guaranteed to operate with
V
than this minimum, correct operation of the device,
(especially after a V
RESET
The RESET signal output can be used to notify a host
processor that the Watchdog timer has expired or the V
voltage supply has dipped below the V
an open drain, active LOW output. Recommended value for
the pull-up resistor is 5kΩ. If unused it can be tied to ground.
In battery mode, the Watchdog timer function is disabled.
The RESET signal output is asserted LOW when the VDD
voltage supply has dipped below the V
the RESET signal output will not return HIGH until the device
is back to V
the V
X1, X2
The X1 and X2 pins are the input and output, respectively, of
an inverting amplifier. An external 32.768kHz quartz crystal
is used with the ISL12027 to supply a timebase for the real
time clock. Internal compensation circuitry provides high
accuracy over the operating temperature range from
-40°C to +85°C. This oscillator compensation network can
be used to calibrate the crystal timing accuracy over
temperature either during manufacturing or with an external
temperature sensor and microcontroller for active
compensation. X2 is intended to drive a crystal only, and
should not drive any external circuit (Figure 11).
NO EXTERNAL COMPENSATION RESISTORS OR
CAPACITORS ARE NEEDED OR ARE RECOMMENDED
TO BE CONNECTED TO THE X1 AND X2 PINS.
BAT
BAT
BAT
FIGURE 11. RECOMMENDED CRYSTAL CONNECTION
DD
supplies power to the device in the event the V
< 1.8V. If the battery voltage is expected to drop lower
voltage is above V
DD
DD
. The output circuitry controls the fall time of
mode (out of Battery Backup mode) even if
DD
power-down cycle) is not guaranteed.
RESET
X1
X2
threshold.
RESET
RESET
threshold. It is
threshold but
2
C interface
August 12, 2010
DD
FN8232.8
DD