ISL12029IB27AZ Intersil, ISL12029IB27AZ Datasheet - Page 26

• Manufacturer Part Number: ISL12029IB27AZ
• Description: IC RTC/CALENDAR EEPROM 14-SOIC
• Manufacturer: Intersil
• Type: Clock/Calendar/Supervisor/EEPROMr

Specifications of ISL12029IB27AZ

• Memory Size: 4K (512 x 8)
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Alarm Operation Examples
Following are examples of both Single Event and periodic
Interrupt Mode alarms.
EXAMPLE 1
Alarm 0 set with single interrupt (IM = ”0”)
A single alarm will occur on January 1 at 11:30am.
A. Set Alarm 0 registers as follows:
REGISTER
ALARM0
MNA0
HRA0
SCA0
DTA0
V
I
V
7 6 5 4 3 2 1 0 HEX
0 0 0 0 0 0 0 0
1 0 1 1 0 0 0 0
1 0 0 1 0 0 0 1
1 0 0 0 0 0 0 1
DD
BAT
I
DD
BAT
RESET
RESET
V
(2.2V)
V
(2.2V)
TRIP
TRIP
V
V
RESET
RESET
BIT
26
V
(2.63V)
(2.63V)
BAT
V
BAT
(3.0V)
FIGURE 29. EXAMPLE RESET OPERATION IN MODE A OR C
(3.0V)
(V
B0h Minutes set to 30,
00h Seconds disabled
91h Hours set to 11,
81h Date set to 1,
DD
POWER, V
enabled
enabled
enabled
FIGURE 30. RESET OPERATION IN MODE D
DESCRIPTION
tPURST
t
PURST
ISL12029, ISL12029A
BAT
NOT CONNECTED)
I
2
I
C BUS ACTIVE
2
C BUS ACTIVE
B. Also the AL0E bit must be set as follows:
After these registers are set, an alarm will be generated when
the RTC advances to exactly 11:30am on January 1 (after
seconds changes from 59 to 00) by setting the AL0 bit in the
status register to “1” and also bringing the IRQ/F
low.
REGISTER
REGISTER
CONTROL
ALARM0
MOA0
DWA0
INT
7 6 5 4 3 2 1 0 HEX
1 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0 HEX
0 0 1 0 0 0 0 0
BIT
BIT
(BATTERY BACKUP MODE)
(BATTERY BACKUP MODE)
81h Month set to 1,
00h Day of week
x0h Enable Alarm
enabled
disabled
DESCRIPTION
DESCRIPTION
December 16, 2010
OUT
output
FN6206.10