ADC121S101CIMF/NOPB National Semiconductor, ADC121S101CIMF/NOPB Datasheet - Page 2

• Manufacturer Part Number: ADC121S101CIMF/NOPB
• Description: IC ADC 12BIT 1MSPS SOT23-6
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of ADC121S101CIMF/NOPB

• Number Of Bits: 12
• Sampling Rate (per Second): 1M
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 10mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: SOT-23-6
• Number Of Elements: 1
• Resolution: 12Bit
• Architecture: SAR
• Sample Rate: 1MSPS
• Input Polarity: Unipolar
• Input Type: Voltage
• Rated Input Volt: 5.25V
• Differential Input: No
• Power Supply Requirement: Single
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.25V
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Differential Linearity Error: ±1LSB
• Integral Nonlinearity Error: -1.1LSB/1LSB
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 6
• Package Type: SOT-23
• Input Signal Type: Single-Ended
• For Use With: ADC121S101EVAL - BOARD EVALUATION FOR ADC121S101
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADC121S101CIMF; ADC121S101CIMFTR

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ANALOG I/O
DIGITAL I/O
POWER SUPPLY
Pin No.
Block Diagram
Pin Descriptions and Equivalent Circuits
PAD
3
4
5
6
1
2
Symbol
SDATA
SCLK
GND
GND
V
CS
V
IN
A
Analog input. This signal can range from 0V to V
Digital clock input. This clock directly controls the conversion and readout processes.
Digital data output. The output samples are clocked out of this pin on falling edges of the SCLK pin.
Chip select. On the falling edge of CS, a conversion process begins.
Positive supply pin. This pin should be connected to a quiet +2.7V to +5.25V source and bypassed to
GND with a 1 µF capacitor and a 0.1 µF monolithic capacitor located within 1 cm of the power pin.
The ground return for the supply and signals.
For package suffix CISD(X) only, it is recommended that the center pad should be connected to ground.
2
Description
A
.
20145007