AD7822BRU Analog Devices Inc, AD7822BRU Datasheet - Page 15

• Manufacturer Part Number: AD7822BRU
• Description: IC ADC 8BIT 1CH 2MSPS 20TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD7822BRU

• Rohs Status: RoHS non-compliant
• Number Of Bits: 8
• Sampling Rate (per Second): 2M
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 36mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP (0.173", 4.40mm Width)

CONVST
POWER VS. THROUGHPUT
Superior power performance can be achieved by using the
automatic power-down (Mode 2) at the end of a conversion
(see the Operating Modes section).
Figure 21 shows how the automatic power-down is implemented
using the CONVST signal to achieve the optimum power
performance for the AD7822/AD7825/AD7829. The duration
of the CONVST pulse is set to be equal to or less than the power-up
time of the devices (see the Operating Modes section). As the
throughput rate is reduced, the device remains in its power-
down state longer and the average power consumption over time
drops accordingly.
CONVST
For example, if the AD7822 is operated in a continuous
sampling mode, with a throughput rate of 100 kSPS and using
an external reference, the power consumption is calculated as
follows. The power dissipation during normal operation is
36 mW, V
time is 330 ns (@ +25°C), the AD7822 can be said to dissipate
36 mW (maximum) for 1.33 μs during each conversion cycle.
If the throughput rate is 100 kSPS, the cycle time is 10 μs and
the average power dissipated during each cycle is (1.33/10) ×
(36 mW) = 4.79 mW. This calculation uses the minimum
conversion time, thus giving the best-case power dissipation at
this throughput rate. However, the actual power dissipated
during each conversion cycle could increase, depending on the
actual conversion time (up to a maximum of 420 ns).
CONVST
V
V
PD
PD
DD
DD
DD
t
POWER-UP
= 3 V. If the power-up time is 1 μs and the conversion
1µs
t
Figure 20. AD7822/AD7825 Power-Up Time
t
POWER-UP
POWER-UP
25µs
1µs
Figure 21. Automatic Power-Down
INITIATED HERE
INITIATED HERE
t
CONVERSION
CONVERSION
CONVERT
330ns
EXTERNAL REFERENCE
ON-CHIP REFERENCE
10µs @ 100kSPS
t
CYCLE
POWER-DOWN
t
POWER-UP
t
POWER-UP
1µs
25µs
INITIATED HERE
CONVERSION
INITIATED HERE
CONVERSION
Rev. C | Page 15 of 28
Figure 22 shows the power vs. throughput rate for automatic
full power-down.
OPERATING MODES
The AD7822/AD7825/AD7829 have two possible modes of
operation, depending on the state of the CONVST pulse
approximately 100 ns after the end of a conversion, that is, upon
the rising edge of the EOC pulse.
Mode 1 Operation (High Speed Sampling)
When the AD7822/AD7825/AD7829 are operated in Mode 1,
they are not powered down between conversions. This mode of
operation allows high throughput rates to be achieved.
Figure 24 shows how this optimum throughput rate is achieved
by bringing CONVST high before the end of a conversion, that
is, before the EOC pulses low. When operating in this mode, a
new conversion should not be initiated until 30 ns after the end
of a read operation. This allows the track-and-hold to acquire
the analog signal to 0.5 LSB accuracy.
100
0.1
10
–10
–20
–30
–40
–50
–60
–70
–80
Figure 22. AD7822/AD7825/AD7829 Power vs. Throughput
1
0
0
0
50
Figure 23. AD7822/AD7825/AD7829 SNR
100
150
THROUGHPUT (kSPS)
AD7822/AD7825/AD7829
200
FREQUENCY (kHz)
250
300
350
2048 POINT FFT
SAMPLING
2MSPS
f
IN
400
= 200kHz
450
5
0
0