MCP4161-502E/SN Microchip Technology, MCP4161-502E/SN Datasheet - Page 29

• Manufacturer Part Number: MCP4161-502E/SN
• Description: IC POT DGTL SNGL 5K SPI 8SOIC
• Manufacturer: Microchip Technology

Specifications of MCP4161-502E/SN

• Package / Case: 8-SOIC (3.9mm Width)
• Taps: 257
• Resistance (ohms): 5K
• Number Of Circuits: 1
• Temperature Coefficient: 150 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: SPI Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Resistance In Ohms: 5K
• Number Of Pots: Single
• Taps Per Pot: 256
• Resistance: 5 KOhms
• Wiper Memory: Non Volatile
• Digital Interface: Serial (4-Wire, SPI)
• Operating Supply Voltage: 2.5 V, 3.3 V, 5 V
• Supply Current: 550 uA
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

4.0
This Data Sheet covers a family of thirty-two Digital
Potentiometer and Rheostat devices that will be
referred to as MCP4XXX. The MCP4XX1 devices are
the Potentiometer configuration, while the MCP4XX2
devices are the Rheostat configuration.
As the
main functional blocks. These are:
•
•
•
•
The POR/BOR operation and the Memory Map are
discussed in this section and the Resistor Network and
SPI operation are described in their own sections. The
Device Commands
Section 7.0.
4.1
The Power-on Reset is the case where the device is
having power applied to it from V
Reset occurs when a device had power applied to it,
and that power (voltage) drops below the specified
range.
The devices RAM retention voltage (V
than the POR/BOR voltage trip point (V
maximum V
When V
performance
specifications. In this region, the device is capable of
reading and writing to its EEPROM and incrementing,
decrementing, reading and writing to its volatile
memory if the proper serial command is executed.
4.1.1
When the device powers up, the device V
the V
the V
• Volatile wiper register is loaded with value in the
• The TCON register is loaded it’s default value
• The device is capable of digital operation
© 2008 Microchip Technology Inc.
POR/BOR Operation
Memory Map
Resistor Network
Serial Interface (SPI)
corresponding non-volatile wiper register
POR
POR
Device Block Diagram
FUNCTIONAL OVERVIEW
POR/BOR Operation
/V
POR
/V
BOR
BOR
POWER-ON RESET
POR
/V
BOR
may
/V
voltage. Once the V
voltage the following happens:
BOR
< V
not
voltage is less then 1.8V.
commands are discussed in
DD
meet
< 2.7V, the electrical
shows, there are four
SS
DD
the
. The Brown-out
POR
voltage crosses
RAM
data
DD
/V
) is lower
BOR
will cross
). The
sheet
MCP414X/416X/424X/426X
4.1.2
When the device powers down, the device V
cross the V
Once the V
voltage the following happens:
• Serial Interface is disabled
• EEPROM Writes are disabled
If the V
the following happens:
• Volatile wiper registers may become corrupted
• TCON register may become corrupted
As the voltage recovers above the V
see Section 4.1.1 “Power-on Reset”.
Serial commands not completed due to a brown-out
condition may cause the memory location (volatile and
non-volatile) to become corrupted.
4.2
The device memory is 16 locations that are 9-bits wide
(16x9 bits). This memory space contains both volatile
and non-volatile locations (see
TABLE 4-1:
Address
0Ah
0Bh
0Ch
0Dh
0Eh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Fh
DD
Memory Map
voltage decreases below the V
DD
POR
BROWN-OUT RESET
Volatile Wiper 0
Volatile Wiper 1
Non-Volatile Wiper 0
Non-Volatile Wiper 1
Volatile TCON Register
Status Register
Data EEPROM
Data EEPROM
Data EEPROM
Data EEPROM
Data EEPROM
Data EEPROM
Data EEPROM
Data EEPROM
Data EEPROM
Data EEPROM
voltage decreases below the V
/V
BOR
MEMORY MAP
Function
voltage.
Table
POR
DS22059B-page 29
4-1).
Memory Type
/V
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
RAM
BOR
RAM
RAM
RAM
RAM
POR
voltage
voltage
DD
/V
BOR
will