AD5170BRM50-RL7 Analog Devices Inc, AD5170BRM50-RL7 Datasheet - Page 14

IC DGTL POT 50K 256POS 10MSOP TR

AD5170BRM50-RL7

Manufacturer Part Number
AD5170BRM50-RL7
Description
IC DGTL POT 50K 256POS 10MSOP TR
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5170BRM50-RL7

Rohs Status
RoHS non-compliant
Taps
256
Resistance (ohms)
50K
Number Of Circuits
1
Temperature Coefficient
35 ppm/°C Typical
Memory Type
Non-Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Resistance In Ohms
50K
AD5170
THEORY OF OPERATION
The AD5170 is a 256-position, digitally controlled, variable
resistor (VR) that employs fuse link technology to achieve
memory retention of the resistance setting.
An internal power-on preset places the wiper at midscale during
power-on. If the OTP function is activated, the device powers
up at the user-defined permanent setting.
ONE-TIME PROGRAMMING (OTP)
Prior to OTP activation, the AD5170 presets to midscale during
initial power-on. After the wiper is set at the desired position,
the resistance can be permanently set by programming the T bit
high along with the proper coding (see Table 9 and Table 10) and
one-time V
family of digital potentiometers requires that V
and 5.8 V blow the fuses to achieve a given nonvolatile setting. On
the other hand, V
system supplies that are lower than 5.6 V, an external supply for
one-time programming is required. Note that the user is allowed
only one attempt in blowing the fuses. If the user fails to blow the
fuses at the first attempt, the structures of the fuses may have
changed such that they can never be blown, regardless of the
energy applied at subsequent events. For details, see the Power
Supply Considerations section.
The device control circuit has two validation bits, E1 and E0,
that can be read back to check the programming status (see
Table 6). Users should always read back the validation bits to
ensure that the fuses are properly blown. After the fuses are
blown, all fuse latches are enabled upon subsequent power-on;
therefore, the output corresponds to the stored setting. Figure 33
shows a detailed functional block diagram.
DD_OTP
. Note that fuse link technology of the AD517x
DD
can be 2.7 V to 5.5 V during operation. For
SCL
SDA
CONTROL BLOCK
PROGRAM/TEST
I
2
C INTERFACE
ONE-TIME
COMPARATOR
DD_OTP
Figure 33. Detailed Functional Block Diagram
between 5.6 V
Rev. F | Page 14 of 24
FUSES
DAC
REG.
EN
Table 6. Validation Status
E1
0
1
1
PROGRAMMING THE VARIABLE RESISTOR AND
VOLTAGE—RHEOSTAT OPERATION
The nominal resistance (R
is available in 2.5 kΩ, 10 kΩ, 50 kΩ, and 100 kΩ. The nominal
resistance of the VR has 256 contact points that are accessed by
the wiper terminal, plus the B terminal contact. The 8-bit data
in the RDAC latch is decoded to select one of the 256 possible
settings.
Assuming that a 10 kΩ part is used, the first connection of the
wiper starts at Terminal B for Data 0x00. Because there is a 50 Ω
wiper contact resistance, such a connection yields a minimum of
100 Ω (2 × 50 Ω) resistance between Terminal W and Terminal B.
The second connection is the first tap point, which corresponds
to 139 Ω (R
0x01. The third connection is the next tap point, representing
178 Ω (2 × 39 Ω + 2 × 50 Ω) for Data 0x02, and so on. Each LSB
data value increase moves the wiper up the resistor ladder until
the last tap point is reached at 10,100 Ω (R
MUX
E0
0
0
1
FUSE
REG.
A
B
WB
Status
Ready for programming.
Fatal error. Some fuses are not blown. Do not retry.
Discard this unit.
Successful. No further programming is possible.
DECODER
= R
W
Figure 34. Rheostat Mode Configuration
AB
/256 + 2 × R
AB
A
B
) between Terminal A and Terminal B
W
W
= 39 Ω + 2 × 50 Ω) for Data
A
W
B
AB
+ 2 × R
A
B
W
W
).

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