X95840UV20I-2.7T1 Intersil, X95840UV20I-2.7T1 Datasheet - Page 2

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X95840UV20I-2.7T1

Manufacturer Part Number
X95840UV20I-2.7T1
Description
IC XDCP QUAD 256TAP 50K 20-TSSOP
Manufacturer
Intersil
Series
XDCP™r
Datasheet

Specifications of X95840UV20I-2.7T1

Taps
256
Resistance (ohms)
50K
Number Of Circuits
4
Temperature Coefficient
45 ppm/°C Typical
Memory Type
Non-Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Resistance In Ohms
50K
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Pin Descriptions
Block Diagram
TSSOP PIN
10
12
13
14
15
16
17
18
19
20
11
1
2
3
4
5
6
7
8
9
SDA
SCL
A2
A1
A0
SYMBOL
RW3
GND
RW2
RW1
RW0
RH3
SDA
RH2
RH1
RH0
SCL
V
RL3
RL2
RL1
RL0
WP
A2
A0
A1
CC
2
INTERFACE
I
2
C
“High” terminal of DCP3
“Low” terminal of DCP3
“Wiper” terminal of DCP3
Device address for the
I
Serial data I/O for the
Device ground pin
“Wiper” terminal of DCP2
“Low” terminal of DCP2
“High” terminal of DCP2
“Wiper” terminal of DCP1
“Low” terminal of DCP1
“High” terminal of DCP1
Device address for the
Device address for the
Power supply pin
Hardware write protection pin. Active low. Prevents any “Write” operation of the
“High” terminal of DCP0
“Low” terminal of DCP0
“Wiper” terminal of DCP0
2
C interface clock
CONTROL AND
NON-VOLATILE
StAtus LOGIC
INTERFACE,
POWER-UP,
REGISTERS
WP
X95840
GND
I
2
I
I
I
2
C
2
2
C
C
C
interface
V
interface
interface
interface
CC
WR3
WR2
WR1
WR0
DESCRIPTION
DCP3
DCP2
DCP1
DCP0
R
R
R
R
R
R
R
R
R
R
R
R
H3
W3
L3
H2
W2
L2
H1
W1
L1
H0
W0
L0
I
2
C
interface.
July 5, 2006
FN8213.2

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