CS4364-CQZ Cirrus Logic Inc, CS4364-CQZ Datasheet - Page 21

• Manufacturer Part Number: CS4364-CQZ
• Description: IC DAC 103DB 24BIT 6CH 48-LQFP
• Manufacturer: Cirrus Logic Inc

Specifications of CS4364-CQZ

• Data Interface: Serial
• Number Of Bits: 24
• Number Of Converters: 8
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 520mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Resolution (bits): 24bit
• Sampling Rate: 192kSPS
• Input Channel Type: Serial
• Supply Voltage Range - Analog: 4.75V To 5.25V
• Supply Current: 63mA
• Digital Ic Case Style: QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CDB4364 - EVALUATION BOARD FOR CS4364
• Settling Time: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 598-1059

DS619F1
4.2
M4
(DIF1)
0
0
0
0
1
1
1
M1
M2
0
0
1
1
0
0
0
0
1
1
1
1
In Hardware Mode, operation is determined by the Mode Select pins. The states of these pins are continu-
ally scanned for any changes; however, the mode should only be changed while the device is in reset
(RST pin low) to ensure proper switching from one mode to another. These pins require connection to sup-
ply or ground as outlined in
Tables 4
In Software Mode, the operational mode and data format are set in the FM and DIF registers. See
Control (Address 03h)” on page
Mode Select
M3
0
0
1
1
0
0
1
(DIF0)
(DEM)
-
M0
M1
0
1
0
1
M2
6
0
0
1
1
0
0
1
1
0
1
0
1
0
1
show the decode of these pins.
Table 6
Left Justified, up to 24-bit data
I
Right Justified, 16-bit Data
Right Justified, 24-bit Data
M1
2
Table 4. PCM Digital Interface Format, Hardware Mode Options
Table 6. Direct Stream Digital (DSD), Hardware Mode Options
S, up to 24-bit data
Table 4
M0
0
1
0
1
0
1
0
1
Table 5. Mode Selection, Hardware Mode Options
M0
Figure
64x oversampled DSD data with a 4x MCLK to DSD data rate
64x oversampled DSD data with a 6x MCLK to DSD data rate
64x oversampled DSD data with a 8x MCLK to DSD data rate
64x oversampled DSD data with a 12x MCLK to DSD data rate
128x oversampled DSD data with a 2x MCLK to DSD data rate
128x oversampled DSD data with a 3x MCLK to DSD data rate
128x oversampled DSD data with a 4x MCLK to DSD data rate
128x oversampled DSD data with a 6x MCLK to DSD data rate
Single-Speed without De-Emphasis (4 kHz to 50 kHz sample rates)
Single-Speed with 44.1 kHz De-Emphasis; see
Double-Speed (50 kHz to 100 kHz sample rates)
Quad-Speed (100 kHz to 200 kHz sample rates)
Auto Speed-Mode Detect (32 kHz to 200 kHz sample rates)
Auto Speed-Mode Detect with 44.1 kHz De-Emphasis; see
DSD Processor Mode
34.
7. For M0, M1, and M2, supply is VLC. For M3 and M4, supply is VLS.
DESCRIPTION
DESCRIPTION
DESCRIPTION
FORMAT
Figure 16
0
1
2
3
Figure 16
FIGURE
CS4364
10
11
8
9
“PCM
21