PPC460EX-SUB800N AMCC, PPC460EX-SUB800N Datasheet - Page 95

• Manufacturer Part Number: PPC460EX-SUB800N
• Manufacturer: AMCC

Revision 1.19 – June 17, 2009
Table 27. I/O Timing—DDR SDRAM T
Notes:
1. The timing values in this table apply to MemClkOut frequency of 200MHz.
2. T
3. DDR1 is supported up to 200MHz. (400Mbps data rate).
Table 28. I/O Timing—DDR SDRAM Write Timing T
Notes:
1. T
2. The timing values in this table apply to MemClkOut frequency of 200MHz.
3. The timing values in this table include 1/4 of a cycle at 200MHz.
4. To obtain adjusted T
5. DDR1 is supported up to 200MHz. (400Mbps data rate).
AMCC Proprietary
MemAddr00:14
BA0:2
BankSel0:3
ClkEn0:3
CAS
RAS
WE
MemData00:07, DM0
MemData08:15, DM1
MemData16:23, DM2
MemData24:31, DM3
MemData32:39, DM4
MemData40:47, DM5
MemData48:55, DM6
MemData56:63, DM7
ECC0:7, DM8
Preliminary Data Sheet
and add 1/4 of the cycle time for the lower clock frequency (for example, T
SA
SD
and T
and T
Signal Names
HA
HD
Signal Name
are referenced to MemClkOut rising edge.
are measured under worst case conditions.
SD
and T
HD
values for clock frequencies less than 200MHz, subtract 1.5ns from the values in the table
Reference Signal
SA
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
, and T
HA
SD
Minimum
T
SA
and T
1.08
1.17
1.12
1.11
1.16
1.17
1.17
(ns)
460EX – PPC460EX Embedded Processor
HD
T
SD
SD
0.96
0.97
0.98
0.98
0.98
0.97
0.96
0.96
0.96
(ns)
− 1.5 + 0.25T
CYC
).
Minimum
T
HA
1.18
1.19
1.15
1.15
1.14
1.13
1.17
(ns)
T
HD
0.995
0.990
0.980
0.980
0.980
0.983
0.982
0.985
0.980
(ns)
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