ST72F324BK6TAS STMicroelectronics, ST72F324BK6TAS Datasheet - Page 167

• Manufacturer Part Number: ST72F324BK6TAS
• Description: 8-BIT MCU
• Manufacturer: STMicroelectronics

ST72324B-Auto
Figure 76. RESET pin protection when LVD is enabled
1. The reset network protects the device against parasitic resets.
2. The output of the external reset circuit must have an open-drain output to drive the ST7 reset pad.
3. Whatever the reset source is (internal or external), the user must ensure that the level on the RESET pin
4. Because the reset circuit is designed to allow the internal RESET to be output in the RESET pin, the user
5. When the LVD is enabled, it is mandatory not to connect a pull-up resistor. A 10nF pull-down capacitor is
6. In case a capacitive power supply is used, it is recommended to connect a 1M ohm pull-down resistor to
7. Tips when using the LVD:
Figure 77. RESET pin protection when LVD is disabled
1. The reset network protects the device against parasitic resets.
2. The output of the external reset circuit must have an open-drain output to drive the ST7 reset pad.
3. Whatever the reset source is (internal or external), the user must ensure that the level on the RESET pin
4. Because the reset circuit is designed to allow the internal RESET to be output in the RESET pin, the user
Otherwise the device can be damaged when the ST7 generates an internal reset (LVD or watchdog).
can go below the V
account internally.
must ensure that the current sunk on the RESET pin (by an external pull-up for example) is less than the
absolute maximum value specified for I
recommended to filter noise on the reset line.
the RESET pin to discharge any residual voltage induced by this capacitive power supply (this will add 5µA
to the power consumption of the MCU).
A. Check that all recommendations related to reset circuit have been applied (see notes above)
B. Check that the power supply is properly decoupled (100nF + 10µF close to the MCU). Refer to AN1709.
If this cannot be done, it is recommended to put a 100nF + 1M ohm pull-down on the RESET pin.
C. The capacitors connected on the RESET pin and also the power supply are key to avoiding any start-up
marginality. In most cases, steps 1 and 2 above are sufficient for a robust solution. Otherwise: Replace
10nF pull-down on the RESET pin with a 5µF to 20µF capacitor.
Otherwise the device can be damaged when the ST7 generates an internal reset (LVD or watchdog).
can go below the V
account internally.
must ensure that the current sunk on the RESET pin (by an external pull-up for example) is less than the
absolute maximum value specified for I
External
reset
Required
external
circuit
User
reset
Recommended
IL
IL
0.01µF
max. level specified in
max. level specified in
0.01µF
1M
Optional
(note 6)
V
DD
Doc ID13466 Rev 4
4.7k
INJ(RESET)
INJ(RESET)
Section
Section 12.10.1
V
V
DD
DD
in
in
R
R
Section 12.2.2 on page
Section
ON
12.10.1. Otherwise the reset will not be taken into
ON
Filter
Filter
12.2.2.
Otherwise the reset will not be taken into
generator
generator
Pulse
(1)(2)(3)(4)(5)(6)
Pulse
(1)(2)(3)(4)
147.
Electrical characteristics
Watchdog
LVD rese
Watchdog
ST72XXX
ST72XXX
Internal
Internal
reset
reset
t
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