ADSP-2104BP-80 Analog Devices Inc, ADSP-2104BP-80 Datasheet - Page 14

IC DSP CONTROLLER 16BIT 68PLCC

ADSP-2104BP-80

Manufacturer Part Number
ADSP-2104BP-80
Description
IC DSP CONTROLLER 16BIT 68PLCC
Manufacturer
Analog Devices Inc
Series
ADSP-21xxr
Type
Fixed Pointr
Datasheet

Specifications of ADSP-2104BP-80

Rohs Status
RoHS non-compliant
Interface
Synchronous Serial Port (SSP)
Clock Rate
20MHz
Non-volatile Memory
External
On-chip Ram
1.5kB
Voltage - I/o
5.00V
Voltage - Core
5.00V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
68-PLCC
Device Core Size
16b
Architecture
Enhanced Harvard
Format
Fixed Point
Clock Freq (max)
20MHz
Mips
20
Device Input Clock Speed
20MHz
Ram Size
512Byte
Program Memory Size
8KB
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
68
Package Type
PLCC
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADSP-2104BP-80
Manufacturer:
AD
Quantity:
13 888
ADSP-2104/ADSP-2109
SPECIFICATIONS (ADSP-2104/ADSP-2109)
POWER DISSIPATION EXAMPLE
To determine total power dissipation in a specific application,
the following equation should be applied for each output:
C = load capacitance, f = output switching frequency.
Example:
In an ADSP-2104 application where external data memory is
used and no other outputs are active, power dissipation is
calculated as follows:
Assumptions:
P
(C
Output
Address, DMS 8
Data, WR
RD
CLKOUT
Total power dissipation for this example = P
ENVIRONMENTAL CONDITIONS
Ambient Temperature Rating:
Package
PLCC
INT
External data memory is accessed every cycle with 50% of the
address pins switching.
External data memory writes occur every other cycle with
50% of the data pins switching.
Each address and data pin has a 10 pF total load at the pin.
The application operates at V
T
T
PD = Power Dissipation in W
CA
JA
JC
AMB
CASE
= internal power dissipation (from Figure 7).
V
= Thermal Resistance (Junction-to-Ambient)
= Thermal Resistance (Junction-to-Case)
DD
= Thermal Resistance (Case-to-Ambient)
Total Power Dissipation = P
= T
= Case Temperature in C
2
CASE
f ) is calculated for each output:
# of
Pins
9
1
1
– (PD
27 C/W
JA
10 pF
10 pF
10 pF
10 pF
C
C
CA
)
V
DD
DD
2
INT
= 5.0 V and t
5
5
5
5
V
2
2
2
2
DD
V
V
V
V
f
+ (C
16 C/W
2
JC
f
20 MHz = 40.0 mW
10 MHz = 22.5 mW
10 MHz = 2.5 mW
20 MHz = 5.0 mW
INT
V
DD
+ 70.0 mW.
CK
2
= 50 ns.
f )
70.0 mW
11 C/W
CA
–14–
Figure 9. Typical Output Valid Delay or Hold vs. Load
Capacitance, C
CAPACITIVE LOADING
Figures 8 and 9 show capacitive loading characteristics.
Figure 8. Typical Output Rise Time vs. Load Capacitance, C
(at Maximum Ambient Operating Temperature)
–1
–2
–3
L
8
7
6
5
4
3
2
1
0
5
4
3
2
1
0
(at Maximum Ambient Operating Temperature)
0
0
25
25
50
50
V
75
75
C
C
DD
L
L
V
DD
– pF
– pF
= 4.5V
100 125
100
= 4.5V
125
150
150
175
175
REV. 0
L

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