EP2C70F672C8N Altera, EP2C70F672C8N Datasheet - Page 60

• Manufacturer Part Number: EP2C70F672C8N
• Description: IC CYCLONE II FPGA 70K 672-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIr

Specifications of EP2C70F672C8N

• Number Of Logic Elements/cells: 68416
• Number Of Labs/clbs: 4276
• Total Ram Bits: 1152000
• Number Of I /o: 422
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 672-FBGA
• No. Of Logic Blocks: 4276
• Family Type: Cyclone II
• No. Of I/o's: 422
• I/o Supply Voltage: 3.3V
• Operating Frequency Max: 320MHz
• Operating Temperature Range: 0°C To +85°C
• Rohs Compliant: Yes
• Family Name: Cyclone® II
• Number Of Logic Blocks/elements: 68416
• # I/os (max): 422
• Frequency (max): 402.58MHz
• Process Technology: 90nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 68416
• Ram Bits: 1152000
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 672
• Package Type: FBGA
• For Use With: P0304 - DE2-70 CALL FOR ACADEMIC PRICING544-1703 - VIDEO KIT W/CYCLONE II EP2C70N544-1699 - DSP KIT W/CYCLONE II EPS2C70N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-1688

I/O Structure & Features
Figure 2–27. DDR SDRAM Interfacing
2–48
Cyclone II Device Handbook, Volume 1
PLL
OE
-90˚ Shifted clk
Register
LE
Register
f
clk
LE
GND
V CC
Register
Register
LE
LE
For more information on Cyclone II external memory interfaces, see the
External Memory Interfaces chapter in Volume 1 of the Cyclone II Device
Handbook.
Control Circuitry
Clock Delay
DQS
t
Clock Control
Block
OE
ENOUT
Register
LE
en/dis
Register
LE
DataA
DataB
Dynamic Enable/Disable
ena_register_mode
Circuitry
Register
Register
Global Clock
LE
LE
DQ
Register
Register
LE
LE
Altera Corporation
Register
LE
February 2007
Resynchronizing
to System Clock
Adjacent LAB LEs
Register
Register
LE
LE