EPF10K30ETI144-2 Altera, EPF10K30ETI144-2 Datasheet - Page 30

• Manufacturer Part Number: EPF10K30ETI144-2
• Description: IC FLEX 10KE FPGA 30K 144-TQFP
• Manufacturer: Altera
• Series: FLEX-10KE®r

Specifications of EPF10K30ETI144-2

• Number Of Logic Elements/cells: 1728
• Number Of Labs/clbs: 216
• Total Ram Bits: 24576
• Number Of I /o: 102
• Number Of Gates: 119000
• Voltage - Supply: 2.375 V ~ 2.625 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 144-TQFP, 144-VQFP
• Family Name: FLEX 10KE
• Number Of Usable Gates: 30000
• Number Of Logic Blocks/elements: 1728
• # Registers: 102
• # I/os (max): 102
• Frequency (max): 200MHz
• Process Technology: CMOS
• Operating Supply Voltage (typ): 2.5V
• Logic Cells: 1728
• Ram Bits: 24576
• Device System Gates: 119000
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (max): 2.625V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 544-1944; EPF10K30ETI144-2

FLEX 10KE Embedded Programmable Logic Devices Data Sheet
Figure 14. FLEX 10KE Interconnect Resources
30
I/O Element (IOE)
Row
Interconnect
Column
Interconnect
IOE
IOE
IOE
IOE
LAB
LAB
B1
A1
I/O Element
An IOE contains a bidirectional I/O buffer and a register that can be used
either as an input register for external data that requires a fast setup time,
or as an output register for data that requires fast clock-to-output
performance. In some cases, using an LE register for an input register will
result in a faster setup time than using an IOE register. IOEs can be used
as input, output, or bidirectional pins. For bidirectional registered I/O
implementation, the output register should be in the IOE, and the data
input and output enable registers should be LE registers placed adjacent
to the bidirectional pin. The Altera Compiler uses the programmable
inversion option to invert signals from the row and column interconnect
automatically where appropriate.
registers.
IOE
IOE
IOE
IOE
LAB
LAB
A2
B2
IOE
IOE
IOE
IOE
LAB
LAB
A3
B3
IOE
IOE
Figure 15
IOE
IOE
See Figure 17
shows the bidirectional I/O
for details.
Carry Chains
Cascade &
LAB A5
LAB A4
LAB B5
LAB B4
Altera Corporation
See Figure 16
for details.
IOE
IOE
IOE
IOE