EPF10K30ETI144-2 Altera, EPF10K30ETI144-2 Datasheet - Page 40

IC FLEX 10KE FPGA 30K 144-TQFP

EPF10K30ETI144-2

Manufacturer Part Number
EPF10K30ETI144-2
Description
IC FLEX 10KE FPGA 30K 144-TQFP
Manufacturer
Altera
Series
FLEX-10KE®r
Datasheet

Specifications of EPF10K30ETI144-2

Number Of Logic Elements/cells
1728
Number Of Labs/clbs
216
Total Ram Bits
24576
Number Of I /o
102
Number Of Gates
119000
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
144-TQFP, 144-VQFP
Family Name
FLEX 10KE
Number Of Usable Gates
30000
Number Of Logic Blocks/elements
1728
# Registers
102
# I/os (max)
102
Frequency (max)
200MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
2.5V
Logic Cells
1728
Ram Bits
24576
Device System Gates
119000
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (max)
2.625V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-1944
EPF10K30ETI144-2

Available stocks

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Manufacturer
Quantity
Price
Part Number:
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Manufacturer:
ALTERA
Quantity:
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Part Number:
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Manufacturer:
Altera
Quantity:
10 000
Part Number:
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Quantity:
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Part Number:
EPF10K30ETI144-2N
Manufacturer:
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0
FLEX 10KE Embedded Programmable Logic Devices Data Sheet
40
t
t
t
f
f
f
t
t
t
t
CLK2
R
F
INDUTY
CLK1
CLKDEV
INCLKSTB
LOCK
JITTER
OUTDUTY
Table 12. ClockLock & ClockBoost Parameters for -1 Speed-Grade Devices
Symbol
Input rise time
Input fall time
Input duty cycle
Input clock frequency (ClockBoost
clock multiplication factor equals 1)
Input clock frequency (ClockBoost
clock multiplication factor equals 2)
Input deviation from user
specification in the MAX+PLUS II
software
Input clock stability (measured
between adjacent clocks)
Time required for ClockLock or
ClockBoost to acquire lock
Jitter on ClockLock or ClockBoost-
generated clock
Duty cycle for ClockLock or
ClockBoost-generated clock
(1)
Parameter
(4)
Tables 12
for -1 and -2 speed-grade devices, respectively.
(3)
and
13
t
t
INCLKSTB
INCLKSTB
summarize the ClockLock and ClockBoost parameters
Condition
< 100
< 50
Min
40
25
16
40
Typ
50
25,000
Altera Corporation
200
Max
180
100
250
60
90
10
60
5
5
(4)
(2)
Unit
PPM
MHz
MHz
ns
ns
ps
µs
ps
ps
%
%

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