EP1AGX90EF1152I6 Altera, EP1AGX90EF1152I6 Datasheet - Page 17

• Manufacturer Part Number: EP1AGX90EF1152I6
• Description: IC ARRIA GX FPGA 90K 1152FBGA
• Manufacturer: Altera
• Series: Arria GXr

Specifications of EP1AGX90EF1152I6

• Number Of Logic Elements/cells: 90220
• Number Of Labs/clbs: 4511
• Total Ram Bits: 4477824
• Number Of I /o: 538
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1152-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Chapter 2: Arria GX Architecture
Transceivers
Figure 2–12. External Termination and Biasing Circuit
© December 2009 Altera Corporation
The receiver has 100- on-chip differential termination (R
protocols, as shown in
if external terminations and biasing are provided. The receiver and transmitter
differential termination method can be set independently of each other.
Figure 2–11. Receiver Input Buffer
If a design uses external termination, the receiver must be externally terminated and
biased to 0.85 V or 1.2 V.
biasing circuit.
Programmable Equalizer
The Arria GX receivers provide a programmable receiver equalization feature to
compensate for the effects of channel attenuation for high-speed signaling. PCB traces
carrying these high-speed signals have low-pass filter characteristics. Impedance
mismatch boundaries can also cause signal degradation. Equalization in the receiver
diminishes the lossy attenuation effects of the PCB at high frequencies.
Termination
Resistance
50-W
Transmission
Line
Input
Pins
V
Receiver External Termination
and Biasing
DD
´ {R2/(R1 + R 2)} = 0.85/1.2 V
Receiver External Termination
Figure
R1/R2 = 1K
Termination
Figure 2–12
V
C1
100-Ω
and Biasing
DD
2–11. You can disable the receiver’s internal termination
shows an example of an external termination and
R2
R1
Programmable
Equalizer
Arria GX Device
RXIN
RXIP
Receiver
D
Arria GX Device Handbook, Volume 1
OCT) for different
Differential
Buffer
Input
2–11