EP2SGX90FF1508C3N Altera, EP2SGX90FF1508C3N Datasheet - Page 234
EP2SGX90FF1508C3N
Manufacturer Part Number
EP2SGX90FF1508C3N
Description
IC STRATIX II GX 90K 1508-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet
1.EP2SGX90FF1508C3N.pdf
(314 pages)
Specifications of EP2SGX90FF1508C3N
Number Of Logic Elements/cells
90960
Number Of Labs/clbs
4548
Total Ram Bits
4520448
Number Of I /o
650
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
1508-FBGA
For Use With
544-1725 - PCIE KIT W/S II GX EP2SGX90N544-1724 - SI KIT W/SII GX EP2SGX90N544-1702 - VIDEO KIT W/SII GX EP2SGX90N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-1772
EP2SGX90FF40C3N
EP2SGX90FF40C3NES
EP2SGX90FF40C3N
EP2SGX90FF40C3NES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2SGX90FF1508C3N
Manufacturer:
ALTERA30
Quantity:
121
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Timing Model
4–64
Stratix II GX Device Handbook, Volume 1
LVTTL
LVCMOS
2.5 V
1.8 V
1.5 V
PCI
PCI-X
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
1.8-V HSTL Class I
Table 4–54. Timing Measurement Methodology for Input Pins (Part 1 of 2)
(6)
(5)
(5)
(5)
(6)
(5)
(5)
I/O Standard
Figure 4–10. Measurement Setup for t
Table 4–54
Din
Din
OE
OE
specifies the input timing measurement setup.
V
CCIO
3.135
3.135
2.375
1.710
1.425
2.970
2.970
2.325
2.325
1.660
1.660
1.660
(V)
Measurement Conditions
t
t
1 MΩ
1 MΩ
ZX
ZX
V
, Tristate to Driving High
Dout
, Tristate to Driving Low
Dout
1.163
1.163
0.830
0.830
0.830
REF
(V)
Dout
Dout
zx
Din
Din
OE
OE
Edge Rate (ns)
Disable
Disable
3.135
3.135
2.375
1.710
1.425
2.970
2.970
2.325
2.325
1.660
1.660
1.660
Notes
Enable
Enable
½ V
½ V
(1), (2), (3),
CCINT
CCINT
Measurement Point
t
t
zh
zl
Altera Corporation
VMEAS (V)
October 2007
1.5675
1.5675
1.1875
0.7125
1.1625
1.1625
0.855
1.485
1.485
0.83
0.83
0.83
(4)
½ V
½ V
“1”
“0”
CCIO
CCIO
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