EP2SGX90FF1508C3N Altera, EP2SGX90FF1508C3N Datasheet - Page 45

• Manufacturer Part Number: EP2SGX90FF1508C3N
• Description: IC STRATIX II GX 90K 1508-FBGA
• Manufacturer: Altera
• Series: Stratix® II GXr

Specifications of EP2SGX90FF1508C3N

• Number Of Logic Elements/cells: 90960
• Number Of Labs/clbs: 4548
• Total Ram Bits: 4520448
• Number Of I /o: 650
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 1508-FBGA
• For Use With: 544-1725 - PCIE KIT W/S II GX EP2SGX90N544-1724 - SI KIT W/SII GX EP2SGX90N544-1702 - VIDEO KIT W/SII GX EP2SGX90N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-1772; EP2SGX90FF40C3N; EP2SGX90FF40C3NES

Altera Corporation
October 2007
The receiver PLL can also drive the regional clocks and regional routing
adjacent to the associated transceiver block.
global clock resource can be used by the recovered clock.
shows which regional clock resource can be used by the recovered clock.
Figure 2–30. Stratix II GX Receiver PLL Recovered Clock to Global Clock
Connection
Notes to
(1)
(2)
CLK[3..0]
CLK# pins are clock pins and their associated number. These are pins for global
and regional clocks.
GCLK# pins are global clock pins.
Figure
7
1
2
8
2–30:
Notes
GCLK[3..0]
(1),
(2)
GCLK[15..12]
CLK[15..12]
GCLK[4..7]
CLK[7..4]
Stratix II GX Device Handbook, Volume 1
11 5
12 6
Figure 2–30
GCLK[11..8]
Stratix II GX Architecture
shows which
Figure 2–31
Stratix II GX
Stratix II GX
Transceiver
Transceiver
Block
Block
2–37