XC2018-70PC84C Xilinx Inc, XC2018-70PC84C Datasheet - Page 11

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XC2018-70PC84C

Manufacturer Part Number
XC2018-70PC84C
Description
IC LOGIC CL ARRAY 1800GAT 84PLCC
Manufacturer
Xilinx Inc
Series
XC2000r
Datasheet

Specifications of XC2018-70PC84C

Number Of Labs/clbs
100
Total Ram Bits
17878
Number Of I /o
74
Number Of Gates
1500
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
84-LCC (J-Lead)
Dc
93+
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Logic Elements/cells
-
Other names
122-1004

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Direct Interconnect
Direct interconnect, shown in Figure 9, provides the most
efficient implementation of networks between adjacent
logic or I/O blocks. Signals routed from block to block by
means of direct interconnect exhibit minimum intercon-
nect propagation and use minimum interconnect re-
sources. For each Configurable Logic Block, the X output
may be connected directly to the C or D inputs of the CLB
above and to the A or B inputs of the CLB below it. The Y
output can use direct interconnect to drive the B input of the
block immediately to its right. Where logic blocks are
adjacent to I/O blocks, direct connect is provided to the
I/O block input (I) on the left edge of the die, the output (O)
on the right edge, or both on I/O blocks at the top and
bottom of the die. Direct interconnections of I/O blocks with
CLBs are shown in Figure 8b.
Crystal Oscillator
Figure 8b also shows the location of an internal high speed
inverting amplifier which may be used to implement an on-
chip crystal oscillator. It is associated with the auxiliary
buffer in the lower right corner of the die. When the
oscillator is configured by MAKEBITS and connected as a
signal source, two special user IOBs are also configured to
connect the oscillator amplifier with external crystal oscil-
lator components as shown in Figure10. The oscillator
circuit becomes active early in the configuration process in
order to allow the oscillator to stabilize. Actual internal
connection is delayed until completion of configuration. In
Figure 10, the feedback resistor R1, between the output
and input, biases the amplifier at threshold. The inversion
of the amplifier, together with the R-C networks and an AT-
cut series resonant crystal, produce the 360-degree phase
shift of the Pierce oscillator. A series resistor R2 may be
included to add to the amplifier output impedance when
needed for phase-shift control, crystal resistance match-
ing, or to limit the amplifier input swing to control clipping
at large amplitudes. Excess feedback voltage may be
corrected by the ratio of C2/C1. The amplifier is designed
to be used from 1 MHz to about one-half the specified CLB
toggle frequency. Use at frequencies below 1 MHz may
require individual characterization with respect to a series
resistance. Crystal oscillators above 20 MHz generally
require a crystal which operates in a third overtone mode,
where the fundamental frequency must be suppressed by
an inductor across C2, turning this parallel resonant circuit
to double the fundamental crystal frequency, i.e., 2/3 of the
desired third harmonic frequency network. When the oscil-
lator inverter is not used, these IOBs and their package
pins are available for general user I/O.
2-195
Figure 10. Crystal Oscillator
Figure 9. Direct Interconnect
Suggested Component Values
R2
C1, C2
R1
Y1
Clock Buffer
Interconnect
Alternate
Direct
0.5 - 1 M
0 - 1 k
(may be required for low
frequency, phase
shift and/or compensation
level for crystal Q)
10 - 40 pF
1 - 20 MHz AT cut series
resonant
C
B
K
D
CLB
CLB
CLB
XTAL2
(IN)
A
X
Y
C1
Switch
Switch
Matrix
Matrix
Y1
48 DIP
68 PLCC
68 PGA
84 PLCC
84 PGA
On-Chip
XTAL1
C2
XTAL1
K11
CLB
CLB
CLB
J10
33
46
56
R1
R2
External
XTAL2
L10
L11
30
43
53
X5404
X5403

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