AT43USB325E-AC Atmel, AT43USB325E-AC Datasheet - Page 22

• Manufacturer Part Number: AT43USB325E-AC
• Description: IC USB KEYBOARD CTRLR HUB 64LQFP
• Manufacturer: Atmel
• Series: AVR®r

Specifications of AT43USB325E-AC

• Applications: Keyboard Controller
• Core Processor: AVR
• Program Memory Type: SRAM (16 kB)
• Controller Series: AT43USB
• Ram Size: 512 x 8
• Interface: SPI, 3-Wire Serial
• Number Of I /o: 42
• Voltage - Supply: 4.4 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

22
AT43USB325
The most typical and general program setup for the Reset and Interrupt Vector Addresses are:
USB related interrupt events are routed to reset vectors 13 and 2 through a separate set of inter-
rupt, interrupt enable and interrupt mask registers that are mapped to the data SRAM space.
These interrupts must be enabled though their control register bits. In the event an interrupt is
generated, the source of the interrupt is identified by reading the interrupt registers. The USB
frame and transaction related interrupt events, such as Start of Frame interrupt, are grouped in
one set of registers: USB Interrupt Flag Register, USB Interrupt Enable Register and USB Inter-
rupt Mask Register. The USB Bus reset and suspend/resume are grouped in another set of
registers: Suspend/Resume Register, Suspend/Resume Interrupt Enable Register and Sus-
pend/Resume Interrupt Mask Register.
Some applications may include firmware routines lasting for long periods that can not be inter-
rupted. At the same time, other less critical events may need attention after the critical routine is
completed. The AT43USB325 solves this problem by having interrupt mask registers in addition
to the interrupt enable registers of the USB related interrupts. The difference between the mask
and enable registers is:
Address
$000
$002
$00E
Overflow
Handler
$018
;
$00d
start
$00e
$00f
$010
$011
...
• The enable register enables the interrupt so it is captured into the interrupt register. If it is not
• The mask register merely masks the interrupt from interrupting the CPU. Upon unmasking,
enabled, and an interrupt occurs, the interrupt will be lost.
the pending interrupt is triggered.
Labels
MAIN:
...
...
Code
jmp
jmp
jmp
jmp
ldi r16, high (RAMEND)
out SPH, r16
ldi r16, low (RAMEND)
out SPL, r16
<instr> xxx
...
RESET
EXT_INT0
TIM0_OVF
USB_HW
Comments
; Reset Handler
; IRQ0 Handler
; Timer0
; USB Handler
; Main Program
3355C–USB–4/05