AT43USB325E-AC Atmel, AT43USB325E-AC Datasheet - Page 8

• Manufacturer Part Number: AT43USB325E-AC
• Description: IC USB KEYBOARD CTRLR HUB 64LQFP
• Manufacturer: Atmel
• Series: AVR®r

Specifications of AT43USB325E-AC

• Applications: Keyboard Controller
• Core Processor: AVR
• Program Memory Type: SRAM (16 kB)
• Controller Series: AT43USB
• Ram Size: 512 x 8
• Interface: SPI, 3-Wire Serial
• Number Of I /o: 42
• Voltage - Supply: 4.4 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

The I/O memory space contains 64 addresses for CPU peripheral functions as Control Regis-
ters, Timer/Counters, and other I/O functions. The I/O Memory can be accessed directly, or as
the Data Space locations following those of the register file, $20 - $5F.
The AVR uses a Harvard architecture concept – with separate memories and buses for program
and data. The program memory is executed with a single-level pipelining. While one instruction
is being executed, the next instruction is pre-fetched from the program memory. This concept
enables instructions to be executed in every clock cycle. The program memory is a download-
able SRAM or a mask programmed ROM.
With the relative jump and call instructions, the whole 24K address space is directly accessed.
Most AVR instructions have a single 16-bit word format. Every program memory address con-
tains a 16- or 32-bit instruction.
During interrupts and subroutine calls, the return address Program Counter (PC) is stored on the
stack. The stack is effectively allocated in the general data SRAM, and consequently, the stack
size is only limited by the total SRAM size and the usage of the SRAM. All user programs must
initialize the Stack Pointer (SP) in the reset routine (before subroutines or interrupts are exe-
cuted). The 10-bit SP is read/write accessible in the I/O space.
The 512-byte data SRAM can be easily accessed through the five different addressing modes
supported in the AVR architecture.
The memory spaces in the AVR architecture are all linear and regular memory maps. A flexible
interrupt module has its control registers in the I/O space with an additional global interrupt
enable bit in the status register. All interrupts have a separate interrupt vector in the interrupt
vector table at the beginning of the program memory. The interrupts have priority in accordance
with their interrupt vector position. The lower the interrupt vector address, the higher the priority.
AT43USB325
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3355C–USB–4/05