MC68LC040RC25A Freescale Semiconductor, MC68LC040RC25A Datasheet - Page 34

IC MPU 32BIT 25MHZ 179-PGA

MC68LC040RC25A

Manufacturer Part Number
MC68LC040RC25A
Description
IC MPU 32BIT 25MHZ 179-PGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68LC040RC25A

Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
179-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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1.10 INSTRUCTION SET OVERVIEW
The instruction set is tailored to support high-level languages and is optimized for those
instructions most commonly executed. The floating-point instructions for the M68040 are a
commonly used subset of the MC68881/MC68882 instruction set with new arithmetic
instructions to explicitly select single- or double-precision rounding. The remaining
unimplemented instructions are less frequently used and are efficiently emulated in the
M68040FPSP, maintaining compatibility with the MC68881/MC68882 floating-point
coprocessors. The M68040 instruction set includes MOVE16, a new user instruction that
allows high-speed transfers of 16-byte blocks between external devices such as memory
to memory or coprocessor to memory. Table 1-4 provides an alphabetized listing of the
M68040 instruction set’s opcode, operation, and syntax. Refer to Table 1-3 for notations
used in Table 1-4. The left operand in the syntax is always the source operand, and the
right operand is the destination operand. Refer to M68000PM/AD, M68000 Family
Programmer’s Reference Manual, for details on instructions used by the M68040.
MOTOROLA
<label>
<list>
MSP
<ea>
SSP
USP
m–n
ISP
FC
SP
UB
LB
cc
C
N
U
V
X
m
*
Z
General Case.
Carry Bit in CCR
Condition Codes from CCR
Function Code
Negative Bit in CCR
Undefined, Reserved for Motorola Use.
Overflow Bit in CCR
Extend Bit in CCR
Zero Bit in CCR
Not Affected or Applicable.
Supervisor/Interrupt Stack Pointer
Supervisor/Master Stack Pointer
Active Stack Pointer
Supervisor (Master or Interrupt) Stack Pointer
User Stack Pointer
Effective Address
Lower Bound
Bit m of an Operand
Bits m through n of Operand
Upper Bound
Assemble Program Label
List of registers, for example D3–D0.
Table 1-3. Notational Conventions (Concluded)
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
M68040 USER’S MANUAL
Register Codes
Stack Pointers
Miscellaneous
1- 13

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