MPC8347VVAGDB Freescale Semiconductor, MPC8347VVAGDB Datasheet - Page 24

IC MPU POWERQUICC II 672-PBGA

MPC8347VVAGDB

Manufacturer Part Number
MPC8347VVAGDB
Description
IC MPU POWERQUICC II 672-PBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II PROr
Datasheets

Specifications of MPC8347VVAGDB

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
400MHz
Voltage
1.2V
Mounting Type
Surface Mount
Package / Case
620-PBGA
Processor Series
MPC8xxx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
MPC8349E-MITXE
Maximum Clock Frequency
400 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
I/o Voltage
1.8 V, 2.5 V, 3.3 V
Minimum Operating Temperature
0 C
Family Name
MPC83xx
Device Core
PowerQUICC II Pro
Device Core Size
32b
Frequency (max)
400MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.2V
Operating Supply Voltage (max)
1.26V
Operating Supply Voltage (min)
1.14V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
672
Package Type
TBGA
Core Size
32 Bit
Program Memory Size
64KB
Cpu Speed
400MHz
Embedded Interface Type
I2C, SPI, USB, UART
Digital Ic Case Style
TBGA
No. Of Pins
672
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Ethernet: Three-Speed Ethernet, MII Management
Figure 8
8.2.1.2
Table 22
24
At recommended operating conditions with LV
RX_CLK clock period
RX_CLK duty cycle
RXD[7:0], RX_DV, RX_ER setup time to RX_CLK
RXD[7:0], RX_DV, RX_ER hold time to RX_CLK
RX_CLK clock rise, V
RX_CLK clock fall time, V
Note:
1. The symbols for timing specifications follow the pattern of t
and t
(GR) with respect to the time data input signals (D) reaching the valid state (V) relative to the t
to the high state (H) or setup time. Also, t
signals (D) went invalid (X) relative to the t
reference symbol is based on three letters representing the clock of a particular function. For example, the subscript of t
represents the GMII (G) receive (RX) clock. For rise and fall times, the latter convention is used with the appropriate letter:
R (rise) or F (fall).
(first two letters of functional block)(reference)(state)(signal)(state)
shows the GMII transmit AC timing diagram.
provides the GMII receive AC timing specifications.
MPC8347E PowerQUICC™ II Pro Integrated Host Processor Hardware Specifications, Rev. 11
GMII Receive AC Timing Specifications
GTX_CLK
TXD[7:0]
Parameter/Condition
TX_EN
TX_ER
IL
(min) to V
IH
(max) to V
IH
Table 22. GMII Receive AC Timing Specifications
(max)
Figure 8. GMII Transmit AC Timing Diagram
IL
t
(min)
GTXH
DD
/OV
GRDXKL
GRX
DD
t
GTX
clock reference (K) going to the low (L) state or hold time. In general, the clock
of 3.3 V ± 10%.
symbolizes GMII receive timing (GR) with respect to the time data input
for outputs. For example, t
(first two letters of functional block)(signal)(state)(reference)(state)
t
t
GRXH
Symbol
GTXF
t
t
GRDVKH
GRDXKH
t
t
t
GRXR
GRXF
GRX
t
GTKHDX
/t
GRX
1
t
GTXR
Min
2.0
0.5
40
GRDVKH
symbolizes GMII receive timing
Typ
8.0
RX
clock reference (K) going
Freescale Semiconductor
Max
1.0
1.0
60
for inputs
Unit
ns
ns
ns
ns
ns
%
GRX

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