MPC8347VVAGDB Freescale Semiconductor, MPC8347VVAGDB Datasheet - Page 54

• Manufacturer Part Number: MPC8347VVAGDB
• Description: IC MPU POWERQUICC II 672-PBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8347VVAGDB

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1.2V
• Mounting Type: Surface Mount
• Package / Case: 620-PBGA
• Processor Series: MPC8xxx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: MPC8349E-MITXE
• Maximum Clock Frequency: 400 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• I/o Voltage: 1.8 V, 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C
• Family Name: MPC83xx
• Device Core: PowerQUICC II Pro
• Device Core Size: 32b
• Frequency (max): 400MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2V
• Operating Supply Voltage (max): 1.26V
• Operating Supply Voltage (min): 1.14V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 672
• Package Type: TBGA
• Core Size: 32 Bit
• Program Memory Size: 64KB
• Cpu Speed: 400MHz
• Embedded Interface Type: I2C, SPI, USB, UART
• Digital Ic Case Style: TBGA
• No. Of Pins: 672
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

SPI
Figure 36
Figure 37
generally reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge
is the active edge.
Figure 37
Figure 38
54
Note: The clock edge is selectable on SPI.
Note: The clock edge is selectable on SPI.
SPICLK (Output)
provides the AC test load for the SPI.
and
shows the SPI timings in slave mode (external clock).
Output Signals:
shows the SPI timings in master mode (internal clock).
SPICLK (Input)
Output Signals:
MPC8347E PowerQUICC™ II Pro Integrated Host Processor Hardware Specifications, Rev. 11
Input Signals:
Input Signals:
(See Note)
(See Note)
Figure 38
(See Note)
(See Note)
SPIMOSI
SPIMISO
SPIMISO
SPIMOSI
Figure 38. SPI AC Timing in Master Mode (Internal Clock) Diagram
Figure 37. SPI AC Timing in Slave Mode (External Clock) Diagram
Output
represent the AC timings from
t
NEIVKH
t
NIIVKH
Figure 36. SPI AC Test Load
Z
0
= 50 Ω
t
NIKHOX
t
NIIXKH
t
NEKHOX
t
NEIXKH
Table
50. Note that although the specifications
R
L
= 50 Ω
OV
DD
/2
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